[PATCH v3 2/2] doc: spacemit: bananapi_f3: document Banana Pi F3 board

Huan Zhou pericycle.cc at gmail.com
Thu Nov 14 08:21:33 CET 2024


From: Kongyang Liu <seashell11234455 at gmail.com>

Add document for Banana Pi F3 board which based on SpacemiT's K1 SoC.

Signed-off-by: Kongyang Liu <seashell11234455 at gmail.com>
Signed-off-by: Huan Zhou <pericycle.cc at gmail.com>
---
 doc/board/index.rst                |  1 +
 doc/board/spacemit/bananapi-f3.rst | 78 ++++++++++++++++++++++++++++++++++++++
 doc/board/spacemit/index.rst       |  8 ++++
 3 files changed, 87 insertions(+)

diff --git a/doc/board/index.rst b/doc/board/index.rst
index 417c128c7af6ad2267ef1bc743c7f10ae70b6de7..367da2d62316d4cab25ecc53f852ef742eba13dd 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -51,6 +51,7 @@ Board-specific doc
    sipeed/index
    socionext/index
    sophgo/index
+   spacemit/index
    st/index
    starfive/index
    ste/index
diff --git a/doc/board/spacemit/bananapi-f3.rst b/doc/board/spacemit/bananapi-f3.rst
new file mode 100644
index 0000000000000000000000000000000000000000..ae98a784a7f19a28658b2d6acad0679cf0a4faa3
--- /dev/null
+++ b/doc/board/spacemit/bananapi-f3.rst
@@ -0,0 +1,78 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Banana Pi F3
+============
+
+About This
+----------
+Banana Pi F3 board is a industrial grade RISC-V development board, it
+design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI
+computing power. 4G DDR and 16G eMMC onboard. 2x GbE Ethernet port, 4x USB
+3.0 and PCIe for M.2 interface, support HDMI and Dual MIPI-CSI Camera.
+
+Building
+~~~~~~~~
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: console
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+3. Before building U-Boot, OpenSBI should be built first. OpenSBI can be
+built for SpacemiT K1 SoC as below:
+
+.. code-block:: console
+
+   git clone https://github.com/cyyself/opensbi -b k1-opensbi
+   cd opensbi
+   make PLATFORM=generic
+
+4. Then build U-Boot as following:
+
+.. code-block:: console
+
+   cd <U-Boot-dir>
+   make bananapi-f3_defconfig
+   make OPENSBI=<OpenSBI-dir>/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate u-boot.itb
+
+Booting
+~~~~~~~
+Currently, we use a modified vendor's U-Boot SPL to load a FIT image that
+includes OpenSBI and U-Boot. Fully describing how to boot into U-Boot is a
+challenging task. And the booting method will be added after the SPL
+support is available.
+
+Sample boot log from Banana Pi F3 board
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.. code-block:: none
+
+   U-Boot 2024.07-00686-g608f2d51760c (Jul 08 2024 - 14:53:51 +0800)
+
+   DRAM:  4 GiB
+   Core:  18 devices, 7 uclasses, devicetree: separate
+   Loading Environment from nowhere... OK
+   In:    serial at d4017000
+   Out:   serial at d4017000
+   Err:   serial at d4017000
+   Net:   No ethernet found.
+   bananapi_f3# cpu detail
+     0: cpu at 0      spacemit,x60
+      ID = 0, freq = 0 Hz: MMU
+     1: cpu at 1      spacemit,x60
+      ID = 1, freq = 0 Hz: MMU
+     2: cpu at 2      spacemit,x60
+      ID = 2, freq = 0 Hz: MMU
+     3: cpu at 3      spacemit,x60
+      ID = 3, freq = 0 Hz: MMU
+     4: cpu at 4      spacemit,x60
+      ID = 4, freq = 0 Hz: MMU
+     5: cpu at 5      spacemit,x60
+      ID = 5, freq = 0 Hz: MMU
+     6: cpu at 6      spacemit,x60
+      ID = 6, freq = 0 Hz: MMU
+     7: cpu at 7      spacemit,x60
+      ID = 7, freq = 0 Hz: MMU
+   bananapi_f3#
diff --git a/doc/board/spacemit/index.rst b/doc/board/spacemit/index.rst
new file mode 100644
index 0000000000000000000000000000000000000000..3fb7d804ac8fc8dd4c7ee67ffc877f9ad323162d
--- /dev/null
+++ b/doc/board/spacemit/index.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+SpacemiT
+========
+.. toctree::
+   :maxdepth: 1
+
+   bananapi-f3

-- 
2.39.5



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