[PATCH] spi: cadence_qspi: Fix OSPI boot issue

[Michal Simek]

On 11/14/24 07:20, Venkatesh Yadav Abbarapu wrote:
> Moving the hw_reset function from the controller driver to
> the NOR framework has caused the OSPI reset not to be triggered
> in the Cadence driver's probe function. As a result, reading the
> flash ID during SPI calibration is incorrect, and the
> CQSPI_REG_RD_DATA_CAPTURE is set with an invalid value.This makes
> it unable to read the flash ID properly.
> To solve this problem, it's suggested to skip SPI calibration and
> instead retrieve the read_delay directly from the device tree.
> 
> Skipping SPI calibration doesn't bring harm since there's no need
> for the flash golden values stored during SPI calibration.
> Instead, they are now read during the spi_nor_read_id call in the
> NOR framework.
> 
> Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar at amd.com>
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
> ---
>   drivers/spi/cadence_qspi.c | 7 -------
>   1 file changed, 7 deletions(-)
> 
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index 9c466f8695..331a46d88f 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -251,13 +251,6 @@ static int cadence_spi_probe(struct udevice *bus)
>   
>   	priv->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, priv->ref_clk_hz);
>   
> -	/* Versal and Versal-NET use spi calibration to set read delay */
> -	if (CONFIG_IS_ENABLED(ARCH_VERSAL) ||
> -	    CONFIG_IS_ENABLED(ARCH_VERSAL_NET) ||
> -	    CONFIG_IS_ENABLED(ARCH_VERSAL2))
> -		if (priv->read_delay >= 0)
> -			priv->read_delay = -1;
> -
>   	/* Reset ospi flash device */
>   	return cadence_qspi_versal_flash_reset(bus);
>   }

Applied.
M