[PATCH] mtd: spi-nor: Send write disable cmd after every write enable

Prasanth Mantena p-mantena at ti.com
Tue Nov 19 14:52:22 CET 2024


On 12:09, Venkatesh Yadav Abbarapu wrote:
> Write enable(06h) command will be sent to a flash device to
> set the write enable latch bit before every program, erase,
> write command. After that write disable command (04h) needs
> to be sent to clear the write enable latch.
> 
> This write_disable() is missing at the majority of the places
> in the driver, add it to clear write enable latch.
> 
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
> ---
>  drivers/mtd/spi/spi-nor-core.c | 23 ++++++++++++++++++++---
>  1 file changed, 20 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index ec841fb13b..5977c634c2 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -944,6 +944,7 @@ static int spi_nor_erase_chip_wait_till_ready(struct spi_nor *nor, unsigned long
>  static int clean_bar(struct spi_nor *nor)
>  {
>  	u8 cmd, bank_sel = 0;
> +	int ret;
>  
>  	if (nor->bank_curr == 0)
>  		return 0;
> @@ -951,7 +952,11 @@ static int clean_bar(struct spi_nor *nor)
>  	nor->bank_curr = 0;
>  	write_enable(nor);
>  
> -	return nor->write_reg(nor, cmd, &bank_sel, 1);
> +	ret = nor->write_reg(nor, cmd, &bank_sel, 1);
> +	if (ret)
> +		return ret;
> +
> +	return write_disable(nor);
>  }
>  
>  static int write_bar(struct spi_nor *nor, u32 offset)
> @@ -1270,6 +1275,10 @@ static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask)
>  	if (ret)
>  		return ret;
>  
> +	ret = write_disable(nor);
> +	if (ret)
> +		return ret;
> +
>  	ret = read_sr(nor);
>  	if (ret < 0)
>  		return ret;
> @@ -1796,13 +1805,18 @@ static int sst26_lock_ctl(struct spi_nor *nor, loff_t ofs, uint64_t len, enum lo
>  	if (ctl == SST26_CTL_CHECK)
>  		return 0;
>  
> +	/* Write latch enable before write operation */
> +	ret = write_enable(nor);
> +	if (ret)
> +		return ret;
> +
>  	ret = nor->write_reg(nor, SPINOR_OP_WRITE_BPR, bpr_buff, bpr_size);
>  	if (ret < 0) {
>  		dev_err(nor->dev, "fail to write block-protection register\n");
>  		return ret;
>  	}
>  
> -	return 0;
> +	return write_disable(nor);
>  }
>  
>  static int sst26_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
> @@ -2204,7 +2218,7 @@ static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr)
>  		return ret;
>  	}
>  
> -	return 0;
> +	return write_disable(nor);
>  }
>  
>  /**
> @@ -4273,6 +4287,9 @@ static int spi_nor_init(struct spi_nor *nor)
>  				write_disable(nor);
>  			}
>  		}
> +		err = write_disable(nor);
> +		if (err)
> +			return err;
>  	}
>  
>  	if (nor->quad_enable) {
> -- 
> 2.17.1
> 
>
Tested on j721s2-evm. 
Link: https://gist.github.com/PrasanthBabuMantena/c12f39744de188a9d08cd5ca51dc2a7b

Tested-by: Prasanth Babu Mantena <p-mantena at ti.com>


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