[PATCH 5/5] usb: eth: r8152: Add support for rtl8157

[ChunHao Lin]

This is used to support rtl8157.

Signed-off-by: ChunHao Lin <hau at realtek.com>
---
 drivers/usb/eth/r8152.c    |  750 +++++++++-
 drivers/usb/eth/r8152.h    |   69 +
 drivers/usb/eth/r8152_fw.c | 2732 ++++++++++++++++++++++++++++++++++++
 3 files changed, 3533 insertions(+), 18 deletions(-)

diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c
index e12753b720..19fa8b75b1 100644
--- a/drivers/usb/eth/r8152.c
+++ b/drivers/usb/eth/r8152.c
@@ -11,6 +11,7 @@
 #include <memalign.h>
 #include <net.h>
 #include <usb.h>
+#include <linux/bug.h>
 #include <linux/delay.h>
 #include <linux/mii.h>
 #include <linux/bitops.h>
@@ -42,6 +43,7 @@ static const struct r8152_version r8152_versions[] = {
 	{ 0x7410, RTL_VER_13, 1, 1},
 	{ 0x6400, RTL_VER_14, 1, 0},
 	{ 0x7420, RTL_VER_15, 1, 1},
+	{ 0x1030, RTL_VER_17, 1, 1},
 };
 
 static
@@ -261,7 +263,62 @@ void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
 	generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 }
 
-u16 ocp_reg_read(struct r8152 *tp, u16 addr)
+static int wait_tgphy_cmd_ready(struct r8152 *tp)
+{
+	int i, ret;
+
+	for (i = 0; i < 10; i++) {
+		u32 ocp_data;
+
+		ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_TGPHY_CMD);
+		if (!(ocp_data & TGPHY_CMD_BUSY))
+			break;
+		mdelay(1);
+	}
+
+	if (i == 10)
+		ret = -ETIMEDOUT;
+	else
+		ret = 0;
+
+	return ret;
+}
+
+static int rtl_tgphy_access(struct r8152 *tp, u16 addr, u16 *data, bool write)
+{
+	u16 cmd = 0;
+	int ret;
+
+	ret = wait_tgphy_cmd_ready(tp);
+	if (ret < 0)
+		goto out;
+
+	if (write) {
+		cmd |= TGPHY_CMD_WR;
+		ocp_write_word(tp, MCU_TYPE_USB, USB_TGPHY_DATA, *data);
+	}
+
+	ocp_write_word(tp, MCU_TYPE_USB, USB_TGPHY_ADDR, addr);
+
+	cmd |= TGPHY_CMD_BUSY;
+	ocp_write_word(tp, MCU_TYPE_USB, USB_TGPHY_CMD, cmd);
+
+	if (!write) {
+		u32 ocp_data;
+
+		ret = wait_tgphy_cmd_ready(tp);
+		if (ret < 0)
+			goto out;
+
+		ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_TGPHY_DATA);
+		*data = (u16)ocp_data;
+	}
+
+out:
+	return ret;
+}
+
+static u16 r8152_phy_read(struct r8152 *tp, u16 addr)
 {
 	u16 ocp_base, ocp_index;
 
@@ -275,7 +332,7 @@ u16 ocp_reg_read(struct r8152 *tp, u16 addr)
 	return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
 }
 
-void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
+static void r8152_phy_write(struct r8152 *tp, u16 addr, u16 data)
 {
 	u16 ocp_base, ocp_index;
 
@@ -289,6 +346,49 @@ void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
 	ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
 }
 
+static u16 r8157_phy_read(struct r8152 *tp, u16 addr)
+{
+	u16 data;
+	int ret;
+
+	ret = rtl_tgphy_access(tp, addr, &data, false);
+	if (ret < 0)
+		return 0;
+	else
+		return data;
+}
+
+static void r8157_phy_write(struct r8152 *tp, u16 addr, u16 data)
+{
+	rtl_tgphy_access(tp, addr, &data, true);
+}
+
+u16 ocp_reg_read(struct r8152 *tp, u16 addr)
+{
+	switch (tp->version) {
+	case RTL_TEST_02:
+	case RTL_VER_16:
+	case RTL_VER_17:
+		return r8157_phy_read(tp, addr);
+	default:
+		return r8152_phy_read(tp, addr);
+	}
+}
+
+void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
+{
+	switch (tp->version) {
+	case RTL_TEST_02:
+	case RTL_VER_16:
+	case RTL_VER_17:
+		r8157_phy_write(tp, addr, data);
+		break;
+	default:
+		r8152_phy_write(tp, addr, data);
+		break;
+	}
+}
+
 static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
 {
 	ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
@@ -436,6 +536,143 @@ static void r8152_mdio_test_and_clr_bit(struct r8152 *tp, u16 addr, u16 clear)
 	}
 }
 
+static int wait_adv_cmd_ready(struct r8152 *tp)
+{
+	int i, ret;
+
+	for (i = 0; i < 10; i++) {
+		u32 ocp_data;
+
+		ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_ADV_CMD);
+		if (!(ocp_data & ADV_CMD_BUSY))
+			break;
+		mdelay(1);
+	}
+
+	if (i == 10)
+		ret = -ETIMEDOUT;
+	else
+		ret = 0;
+
+	return ret;
+}
+
+static int
+ocp_adv_access(struct r8152 *tp, int type, u16 addr, u32 *data, bool write)
+{
+	u16 cmd;
+	int ret;
+
+	switch (type) {
+	case ADV_TYPE_BMU:
+		cmd = ADV_CMD_BMU;
+		break;
+	case ADV_TYPE_IP:
+		cmd = ADV_CMD_IP;
+		break;
+	default:
+		WARN_ON_ONCE(1);
+		return -EPERM;
+	}
+
+	ret = wait_adv_cmd_ready(tp);
+	if (ret < 0)
+		goto out;
+
+	if (write) {
+		cmd |= ADV_CMD_WR;
+		ocp_write_dword(tp, MCU_TYPE_USB, USB_ADV_DATA, *data);
+	}
+
+	ocp_write_word(tp, MCU_TYPE_USB, USB_ADV_ADDR, addr);
+
+	cmd |= ADV_CMD_BUSY;
+	ocp_write_word(tp, MCU_TYPE_USB, USB_ADV_CMD, cmd);
+
+	if (!write) {
+		ret = wait_adv_cmd_ready(tp);
+		if (ret < 0)
+			goto out;
+
+		*data = ocp_read_dword(tp, MCU_TYPE_USB, USB_ADV_DATA);
+	}
+
+out:
+	return ret;
+}
+
+static int rtl_bmu_read(struct r8152 *tp, u16 addr, u32 *data)
+{
+	return ocp_adv_access(tp, ADV_TYPE_BMU, addr, data, false);
+}
+
+static int rtl_bmu_write(struct r8152 *tp, u16 addr, u32 data)
+{
+	return ocp_adv_access(tp, ADV_TYPE_BMU, addr, &data, true);
+}
+
+static int rtl_bmu_w0w1(struct r8152 *tp, u16 addr, u32 clear, u32 set)
+{
+	u32 bmu;
+	int ret;
+
+	ret = rtl_bmu_read(tp, addr, &bmu);
+	if (ret < 0)
+		goto out;
+
+	bmu = (bmu & ~clear) | set;
+	ret = rtl_bmu_write(tp, addr, bmu);
+
+out:
+	return ret;
+}
+
+static int rtl_bmu_clr_bits(struct r8152 *tp, u16 addr, u32 clear)
+{
+	return rtl_bmu_w0w1(tp, addr, clear, 0);
+}
+
+static int rtl_bmu_set_bits(struct r8152 *tp, u16 addr, u32 set)
+{
+	return rtl_bmu_w0w1(tp, addr, 0, set);
+}
+
+static int rtl_ip_read(struct r8152 *tp, u16 addr, u32 *data)
+{
+	return ocp_adv_access(tp, ADV_TYPE_IP, addr, data, false);
+}
+
+static int rtl_ip_write(struct r8152 *tp, u16 addr, u32 data)
+{
+	return ocp_adv_access(tp, ADV_TYPE_IP, addr, &data, true);
+}
+
+static int rtl_ip_w0w1(struct r8152 *tp, u16 addr, u32 clear, u32 set)
+{
+	int ret;
+	u32 ip;
+
+	ret = rtl_ip_read(tp, addr, &ip);
+	if (ret < 0)
+		goto out;
+
+	ip = (ip & ~clear) | set;
+	ret = rtl_ip_write(tp, addr, ip);
+
+out:
+	return ret;
+}
+
+static int rtl_ip_clr_bits(struct r8152 *tp, u16 addr, u32 clear)
+{
+	return rtl_ip_w0w1(tp, addr, clear, 0);
+}
+
+static int rtl_ip_set_bits(struct r8152 *tp, u16 addr, u32 set)
+{
+	return rtl_ip_w0w1(tp, addr, 0, set);
+}
+
 int r8152_wait_for_bit(struct r8152 *tp, bool ocp_reg, u16 type, u16 index,
 		       const u32 mask, bool set, unsigned int timeout)
 {
@@ -529,6 +766,8 @@ static void rtl8152_nic_reset(struct r8152 *tp)
 			mdelay(1);
 		}
 		break;
+	case RTL_VER_16:
+	case RTL_VER_17:
 	default:
 		ocp_byte_clr_bits(tp, MCU_TYPE_PLA, PLA_CR,
 				  PLA_CR_RE | PLA_CR_TE);
@@ -648,6 +887,8 @@ static void r8153_set_rx_early_timeout(struct r8152 *tp)
 	case RTL_VER_12:
 	case RTL_VER_13:
 	case RTL_VER_15:
+	case RTL_VER_16:
+	case RTL_VER_17:
 		ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
 			       640 / 8);
 		ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
@@ -687,6 +928,13 @@ static void r8153_set_rx_early_size(struct r8152 *tp)
 			       ocp_data / 8);
 		break;
 
+	case RTL_TEST_02:
+	case RTL_VER_16:
+	case RTL_VER_17:
+		ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
+			       ocp_data / 16);
+		break;
+
 	default:
 		debug("** %s Invalid Device\n", __func__);
 		break;
@@ -747,6 +995,13 @@ static int rtl8156_enable(struct r8152 *tp)
 	return rtl8153_enable(tp);
 }
 
+static int rtl8157_enable(struct r8152 *tp)
+{
+	r8156_fc_parameter(tp);
+
+	return rtl8153_enable(tp);
+}
+
 static void rtl_disable(struct r8152 *tp)
 {
 	u32 ocp_data;
@@ -804,6 +1059,8 @@ static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
 	case RTL_VER_12:
 	case RTL_VER_13:
 	case RTL_VER_15:
+	case RTL_VER_16:
+	case RTL_VER_17:
 	default:
 		if (enable)
 			ocp_word_set_bits(tp, MCU_TYPE_PLA, PLA_RCR1,
@@ -881,6 +1138,14 @@ static void r8153_u2p3en(struct r8152 *tp, bool enable)
 	ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
 }
 
+static void r8157_u2p3en(struct r8152 *tp, bool enable)
+{
+	if (enable)
+		rtl_ip_set_bits(tp, 0xc2c0, BIT(29));
+	else
+		rtl_ip_clr_bits(tp, 0xc2c0, BIT(29));
+}
+
 bool r8156b_flash_used(struct r8152 *tp)
 {
 	u32 ocp_data;
@@ -946,6 +1211,19 @@ static void r8153b_power_cut_en(struct r8152 *tp, bool enable)
 	ocp_word_clr_bits(tp, MCU_TYPE_USB, USB_MISC_0, PCUT_STATUS);
 }
 
+static void r8157_power_cut_en(struct r8152 *tp, bool enable)
+{
+	if (enable) {
+		ocp_word_set_bits(tp, MCU_TYPE_USB, USB_POWER_CUT,
+				  PWR_EN | PHASE2_EN);
+		ocp_byte_set_bits(tp, MCU_TYPE_USB, USB_MISC_2, BIT(1));
+	} else {
+		ocp_word_clr_bits(tp, MCU_TYPE_USB, USB_POWER_CUT, PWR_EN);
+		ocp_word_clr_bits(tp, MCU_TYPE_USB, USB_MISC_0, PCUT_STATUS);
+		ocp_byte_clr_bits(tp, MCU_TYPE_USB, USB_MISC_2, BIT(1));
+	}
+}
+
 static void r8153_teredo_off(struct r8152 *tp)
 {
 	switch (tp->version) {
@@ -961,6 +1239,8 @@ static void r8153_teredo_off(struct r8152 *tp)
 				  OOB_TEREDO_EN);
 		break;
 
+	case RTL_VER_08:
+	case RTL_VER_09:
 	case RTL_TEST_01:
 	case RTL_VER_10:
 	case RTL_VER_11:
@@ -968,6 +1248,8 @@ static void r8153_teredo_off(struct r8152 *tp)
 	case RTL_VER_13:
 	case RTL_VER_14:
 	case RTL_VER_15:
+	case RTL_VER_16:
+	case RTL_VER_17:
 	default:
 		/* The bit 0 ~ 7 are relative with teredo settings. They are
 		 * W1C (write 1 to clear), so set all 1 to disable it.
@@ -983,13 +1265,36 @@ static void r8153_teredo_off(struct r8152 *tp)
 
 static void rtl_reset_bmu(struct r8152 *tp)
 {
-	u8 ocp_data;
-
-	ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
-	ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
-	ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
-	ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
-	ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
+	switch (tp->version) {
+	case RTL_VER_03:
+	case RTL_VER_04:
+	case RTL_VER_05:
+	case RTL_VER_06:
+	case RTL_VER_08:
+	case RTL_VER_09:
+	case RTL_TEST_01:
+	case RTL_VER_10:
+	case RTL_VER_11:
+	case RTL_VER_12:
+	case RTL_VER_13:
+	case RTL_VER_14:
+	case RTL_VER_15:
+		ocp_byte_clr_bits(tp, MCU_TYPE_USB, USB_BMU_RESET,
+				  BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
+		ocp_byte_set_bits(tp, MCU_TYPE_USB, USB_BMU_RESET,
+				  BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
+		break;
+	case RTL_VER_17:
+		rtl_bmu_set_bits(tp, 0x2350, BIT(1));
+		rtl_bmu_set_bits(tp, 0x2360, BIT(0));
+		rtl_bmu_set_bits(tp, 0x2350, BIT(0));
+		rtl_bmu_set_bits(tp, 0x2450, BIT(1));
+		rtl_bmu_set_bits(tp, 0x2460, BIT(0));
+		rtl_bmu_set_bits(tp, 0x2450, BIT(0));
+		break;
+	default:
+		break;
+	}
 }
 
 void rtl_reset_ocp_base(struct r8152 *tp)
@@ -1828,6 +2133,218 @@ static void r8156b_hw_phy_cfg(struct r8152 *tp)
 	ocp_reg_clr_bits(tp, 0xa5ea, BIT(0));
 }
 
+static void r8157_hw_phy_cfg(struct r8152 *tp)
+{
+	int ret;
+
+	r8156b_wait_loading_flash(tp);
+
+	r8157_patch_code(tp);
+
+	ocp_word_test_and_clr_bits(tp, MCU_TYPE_USB, USB_MISC_0, PCUT_STATUS);
+
+	ret = r8153_phy_status(tp, 0);
+	if (ret < 0)
+		return;
+
+	switch (ret) {
+	case PHY_STAT_EXT_INIT:
+		r8157_firmware(tp, true);
+		ocp_reg_clr_bits(tp, 0xa466, BIT(0));
+		ocp_reg_clr_bits(tp, 0xa468, BIT(3) | BIT(1));
+		break;
+	case PHY_STAT_LAN_ON:
+	case PHY_STAT_PWRDN:
+	default:
+		r8157_firmware(tp, false);
+		break;
+	}
+
+	r8152_mdio_test_and_clr_bit(tp, MII_BMCR, BMCR_PDOWN);
+
+	ret = r8153_phy_status(tp, PHY_STAT_LAN_ON);
+	if (ret < 0)
+		return;
+	WARN_ON_ONCE(ret != PHY_STAT_LAN_ON);
+
+	/* PFM mode */
+	ocp_word_clr_bits(tp, MCU_TYPE_PLA, PLA_PHY_PWR, PFM_PWM_SWITCH);
+
+	/* advanced Power Saving paramater */
+	ocp_reg_set_bits(tp, 0xa430, BIT(0) | BIT(1));
+
+	/* aldpsce force mode */
+	ocp_reg_clr_bits(tp, 0xa44a, BIT(2));
+
+	switch (tp->version) {
+	case RTL_VER_17:
+		/* XG_INRX parameter */
+		sram_write_w0w1(tp, 0x8183, 0xff00, 0x5900);
+
+		ocp_reg_set_bits(tp, 0xa654, BIT(11));
+		ocp_reg_set_bits(tp, 0xb648, BIT(14));
+		ocp_reg_clr_bits(tp, 0xad2c, BIT(15));
+		ocp_reg_set_bits(tp, 0xad94, BIT(5));
+		ocp_reg_set_bits(tp, 0xada0, BIT(1));
+		ocp_reg_w0w1(tp, 0xae06, 0xfc00, 0x7c00);
+
+		ocp_reg_write(tp, 0xb87c, 0x8647);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0xe600);
+		ocp_reg_write(tp, 0xb87c, 0x8036);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x3000);
+		ocp_reg_write(tp, 0xb87c, 0x8078);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x3000);
+
+		/* green mode */
+		ocp_reg_write(tp, 0xb87c, 0x89e9);
+		ocp_reg_clr_bits(tp, 0xb87e, 0xff00);
+		ocp_reg_write(tp, 0xb87c, 0x8ffd);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0100);
+		ocp_reg_write(tp, 0xb87c, 0x8ffe);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0200);
+		ocp_reg_write(tp, 0xb87c, 0x8fff);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0400);
+
+		/* recognize AQC/Bcom function */
+		sram_write_w0w1(tp, 0x8018, 0xff00, 0x7700);
+		ocp_reg_write(tp, OCP_SRAM_ADDR, 0x8f9c);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x0005);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x0000);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x00ed);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x0502);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x0b00);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0xd401);
+		sram_write_w0w1(tp, 0x8fa8, 0xff00, 0x2900);
+
+		/* RFI_corr_thd 5g */
+		ocp_reg_write(tp, 0xb87c, 0x814b);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x1100);
+		ocp_reg_write(tp, 0xb87c, 0x814d);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x1100);
+		ocp_reg_write(tp, 0xb87c, 0x814f);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0b00);
+		ocp_reg_write(tp, 0xb87c, 0x8142);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0100);
+		ocp_reg_write(tp, 0xb87c, 0x8144);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0100);
+		ocp_reg_write(tp, 0xb87c, 0x8150);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0100);
+		/* RFI_corr_thd 2p5g */
+		ocp_reg_write(tp, 0xb87c, 0x8118);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0700);
+		ocp_reg_write(tp, 0xb87c, 0x811a);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0700);
+		ocp_reg_write(tp, 0xb87c, 0x811c);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0500);
+		ocp_reg_write(tp, 0xb87c, 0x810f);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0100);
+		ocp_reg_write(tp, 0xb87c, 0x8111);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0100);
+		ocp_reg_write(tp, 0xb87c, 0x811d);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0100);
+
+		/* RFI parameter */
+		ocp_reg_clr_bits(tp, 0xad1c, BIT(8));
+		ocp_reg_w0w1(tp, 0xade8, 0xffc0, 0x1400);
+
+		ocp_reg_write(tp, 0xb87c, 0x864b);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x9d00);
+		ocp_reg_write(tp, 0xb87c, 0x862c);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x1200);
+
+		ocp_reg_write(tp, OCP_SRAM_ADDR, 0x8566);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x003f);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x3f02);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x023c);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x3b0a);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x1c00);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x0000);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x0000);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x0000);
+		ocp_reg_write(tp, OCP_SRAM_DATA, 0x0000);
+
+		/* RFI-color noise gen parameter 5g */
+		ocp_reg_set_bits(tp, 0xad9c, BIT(5));
+		ocp_reg_write(tp, 0xb87c, 0x8122);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0c00);
+		ocp_reg_write(tp, 0xb87c, 0x82c8);
+		ocp_reg_write(tp, 0xb87e, 0x03ed);
+		ocp_reg_write(tp, 0xb87e, 0x03ff);
+		ocp_reg_write(tp, 0xb87e, 0x0009);
+		ocp_reg_write(tp, 0xb87e, 0x03fe);
+		ocp_reg_write(tp, 0xb87e, 0x000b);
+		ocp_reg_write(tp, 0xb87e, 0x0021);
+		ocp_reg_write(tp, 0xb87e, 0x03f7);
+		ocp_reg_write(tp, 0xb87e, 0x03b8);
+		ocp_reg_write(tp, 0xb87e, 0x03e0);
+		ocp_reg_write(tp, 0xb87e, 0x0049);
+		ocp_reg_write(tp, 0xb87e, 0x0049);
+		ocp_reg_write(tp, 0xb87e, 0x03e0);
+		ocp_reg_write(tp, 0xb87e, 0x03b8);
+		ocp_reg_write(tp, 0xb87e, 0x03f7);
+		ocp_reg_write(tp, 0xb87e, 0x0021);
+		ocp_reg_write(tp, 0xb87e, 0x000b);
+		ocp_reg_write(tp, 0xb87e, 0x03fe);
+		ocp_reg_write(tp, 0xb87e, 0x0009);
+		ocp_reg_write(tp, 0xb87e, 0x03ff);
+		ocp_reg_write(tp, 0xb87e, 0x03ed);
+		/* RFI-color noise gen parameter 2p5g */
+		ocp_reg_write(tp, 0xb87c, 0x80ef);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x0c00);
+		ocp_reg_write(tp, 0xb87c, 0x82a0);
+		ocp_reg_write(tp, 0xb87e, 0x000e);
+		ocp_reg_write(tp, 0xb87e, 0x03fe);
+		ocp_reg_write(tp, 0xb87e, 0x03ed);
+		ocp_reg_write(tp, 0xb87e, 0x0006);
+		ocp_reg_write(tp, 0xb87e, 0x001a);
+		ocp_reg_write(tp, 0xb87e, 0x03f1);
+		ocp_reg_write(tp, 0xb87e, 0x03d8);
+		ocp_reg_write(tp, 0xb87e, 0x0023);
+		ocp_reg_write(tp, 0xb87e, 0x0054);
+		ocp_reg_write(tp, 0xb87e, 0x0322);
+		ocp_reg_write(tp, 0xb87e, 0x00dd);
+		ocp_reg_write(tp, 0xb87e, 0x03ab);
+		ocp_reg_write(tp, 0xb87e, 0x03dc);
+		ocp_reg_write(tp, 0xb87e, 0x0027);
+		ocp_reg_write(tp, 0xb87e, 0x000e);
+		ocp_reg_write(tp, 0xb87e, 0x03e5);
+		ocp_reg_write(tp, 0xb87e, 0x03f9);
+		ocp_reg_write(tp, 0xb87e, 0x0012);
+		ocp_reg_write(tp, 0xb87e, 0x0001);
+		ocp_reg_write(tp, 0xb87e, 0x03f1);
+
+		/* modify thermal speed down threshold */
+		ocp_reg_w0w1(tp, 0xb54c, 0xffc0, 0x3700);
+
+		/* XG compatibility modification */
+		ocp_reg_set_bits(tp, 0xb648, BIT(6));
+		ocp_reg_write(tp, 0xb87c, 0x8082);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x5d00);
+		ocp_reg_write(tp, 0xb87c, 0x807c);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x5000);
+		ocp_reg_write(tp, 0xb87c, 0x809d);
+		ocp_reg_w0w1(tp, 0xb87e, 0xff00, 0x5000);
+		break;
+	default:
+		break;
+	}
+
+	if (rtl_phy_patch_request(tp, true, true))
+		return;
+
+	ocp_word_clr_bits(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, EEE_SPDWN_EN);
+
+	ocp_reg_w0w1(tp, OCP_DOWN_SPEED, EN_EEE_100 | EN_EEE_1000,
+		     EN_10M_CLKDIV);
+
+	ocp_reg_clr_bits(tp, OCP_POWER_CFG, EEE_CLKDIV_EN);
+
+	rtl_phy_patch_request(tp, false, true);
+
+	ocp_reg_clr_bits(tp, 0xa428, BIT(9));
+	ocp_reg_clr_bits(tp, 0xa5ea, BIT(0) | BIT(1));
+}
+
 static void r8153_first_init(struct r8152 *tp)
 {
 	u32 ocp_data;
@@ -2025,6 +2542,10 @@ static u16 rtl8152_get_support_speed(struct r8152 *tp)
 	case RTL_VER_12:
 	case RTL_VER_13:
 		return SPEED_2500;
+	case RTL_TEST_02:
+	case RTL_VER_16:
+	case RTL_VER_17:
+		return SPEED_5000;
 	default:
 		if (tp->supports_gmii)
 			return SPEED_1000;
@@ -2109,6 +2630,19 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
 				anar |= ADVERTISE_100HALF;
 				gbcr |= ADVERTISE_1000HALF;
 			}
+		} else if (speed == SPEED_5000 &&
+			   rtl8152_get_support_speed(tp) >= SPEED_5000) {
+			if (duplex == DUPLEX_FULL) {
+				anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+				anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+				gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
+				gbcr2|= MDIO_AN_10GBT_CTRL_ADV2_5G |
+					MDIO_AN_10GBT_CTRL_ADV5G;
+			} else {
+				anar |= ADVERTISE_10HALF;
+				anar |= ADVERTISE_100HALF;
+				gbcr |= ADVERTISE_1000HALF;
+			}
 		} else {
 			return -EINVAL;
 		}
@@ -2189,6 +2723,16 @@ static void rtl8156_down(struct r8152 *tp)
 	r8156_enter_oob(tp);
 }
 
+static void rtl8157_up(struct r8152 *tp)
+{
+	rtl8156_up(tp);
+}
+
+static void rtl8157_down(struct r8152 *tp)
+{
+	rtl8156_down(tp);
+}
+
 static void r8156_mdio_force_mode(struct r8152 *tp)
 {
 	/* Select force mode through 0xa5b4 bit 15
@@ -2218,8 +2762,18 @@ static void r8152b_get_version(struct r8152 *tp)
 	}
 
 	/* set descriptor size */
-	tp->rx_desc_size = sizeof(struct rx_desc);
-	tp->tx_desc_size = sizeof(struct tx_desc);
+	switch (tp->version) {
+	case RTL_TEST_02:
+	case RTL_VER_16:
+	case RTL_VER_17:
+		tp->rx_desc_size = sizeof(struct rx_desc_v2);
+		tp->tx_desc_size = sizeof(struct tx_desc_v2);
+		break;
+	default:
+		tp->rx_desc_size = sizeof(struct rx_desc);
+		tp->tx_desc_size = sizeof(struct tx_desc);
+		break;
+	}
 
 	if (tp->version == RTL_VER_UNKNOWN)
 		debug("r8152 Unknown tcr version 0x%04x\n", tcr);
@@ -2543,6 +3097,97 @@ static void r8156b_init(struct r8152 *tp)
 	r8152b_enable_fc(tp);
 }
 
+static void r8157_init(struct r8152 *tp)
+{
+	u32 ocp_data;
+	u16 data;
+
+	ocp_byte_set_bits(tp, MCU_TYPE_USB, USB_MISC_3, SWDT_TIMEOUT_SW_RST);
+	ocp_byte_clr_bits(tp, MCU_TYPE_USB, 0xd3ca, BIT(0));
+
+	ocp_byte_clr_bits(tp, MCU_TYPE_USB, USB_ECM_OP, EN_ALL_SPEED);
+	ocp_write_word(tp, MCU_TYPE_USB, USB_SPEED_OPTION, 0);
+	ocp_word_set_bits(tp, MCU_TYPE_USB, USB_ECM_OPTION,
+			  BYPASS_MAC_RESET);
+	ocp_word_set_bits(tp, MCU_TYPE_USB, USB_U2P3_CTRL, RX_DETECT8);
+
+	r8153_disable_aldps(tp);
+	r8153b_u1u2en(tp, false);
+
+	r8156b_wait_loading_flash(tp);
+
+	r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_BOOT_CTRL,
+			   AUTOLOAD_DONE, 1, R8152_WAIT_TIMEOUT);
+
+	data = r8153_phy_status(tp, 0);
+	if (data == PHY_STAT_EXT_INIT) {
+		ocp_reg_clr_bits(tp, 0xa468, BIT(3) | BIT(1));
+		ocp_reg_clr_bits(tp, 0xa466, BIT(0));
+	}
+
+	r8152_mdio_test_and_clr_bit(tp, MII_BMCR, BMCR_PDOWN);
+
+	r8153_phy_status(tp, PHY_STAT_LAN_ON);
+
+	r8157_u2p3en(tp, false);
+
+	/* Disable Interrupt Mitigation */
+	ocp_byte_clr_bits(tp, MCU_TYPE_USB, 0xcf04,
+			  BIT(0) | BIT(1) | BIT(2) | BIT(7));
+
+	/* Disable all_speed_capability & rg_pwrdn_en */
+	ocp_word_clr_bits(tp, MCU_TYPE_USB, USB_SPEED_OPTION,
+			  RG_PWRDN_EN | ALL_SPEED_OFF);
+
+	/* Enable Auto Speed up */
+	ocp_word_set_bits(tp, MCU_TYPE_USB, USB_FW_CTRL, AUTO_SPEEDUP);
+
+
+	/* MSC timer = 0xfff * 8ms = 32760 ms */
+	ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
+
+	r8157_power_cut_en(tp, false);
+
+	ocp_word_clr_bits(tp, MCU_TYPE_PLA, PLA_RCR, SLOT_EN);
+
+	ocp_word_set_bits(tp, MCU_TYPE_PLA, PLA_CPCR, FLOW_CTRL_EN);
+
+	/* enable fc timer and set timer to 600 ms. */
+	ocp_write_word(tp, MCU_TYPE_USB, USB_FC_TIMER,
+		       CTRL_TIMER_EN | (600 / 8));
+
+	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_POL_GPIO_CTRL);
+	if (!(ocp_data & DACK_DET_EN))
+		ocp_word_w0w1(tp, MCU_TYPE_USB, USB_FW_CTRL, AUTO_SPEEDUP,
+			      FLOW_CTRL_PATCH_2);
+	else
+		ocp_word_clr_bits(tp, MCU_TYPE_USB, USB_FW_CTRL,
+				  AUTO_SPEEDUP);
+
+	ocp_word_set_bits(tp, MCU_TYPE_USB, USB_FW_TASK, FC_PATCH_TASK);
+
+	/* Disable bypass_turn_off_clk_in_aldps */
+	ocp_byte_clr_bits(tp, MCU_TYPE_PLA, 0xd3c8, BIT(0));
+
+	r8156_mac_clk_spd(tp, false);
+
+	/* rx aggregation, 16 bytes Rx descriptor */
+	ocp_word_clr_bits(tp, MCU_TYPE_USB, USB_USB_CTRL,
+			  RX_AGG_DISABLE | RX_HDR32_EN);
+
+	/* Disable Rx Zero Len */
+	rtl_bmu_clr_bits(tp, 0x2300, BIT(3));
+
+	r8156_mdio_force_mode(tp);
+
+	/* TX descriptor Signature */
+	ocp_byte_clr_bits(tp, MCU_TYPE_USB, 0xd4ae, BIT(1));
+
+	rtl_tally_reset(tp);
+	r8157_hw_phy_cfg(tp);
+	r8152b_enable_fc(tp);
+}
+
 static void rtl8152_unload(struct r8152 *tp)
 {
 	if (tp->version != RTL_VER_01)
@@ -2620,6 +3265,16 @@ static int rtl_ops_init(struct r8152 *tp)
 		ops->down		= rtl8153b_down;
 		break;
 
+	case RTL_TEST_02:
+	case RTL_VER_16:
+	case RTL_VER_17:
+		ops->init		= r8157_init;
+		ops->enable		= rtl8157_enable;
+		ops->disable		= rtl8156_disable;
+		ops->up			= rtl8157_up;
+		ops->down		= rtl8157_down;
+		break;
+
 	default:
 		ret = -ENODEV;
 		printf("r8152 Unknown Device\n");
@@ -2660,8 +3315,65 @@ static int r8152_init_common(struct r8152 *tp)
 	return 0;
 }
 
-static int r8152_send_common(struct ueth_data *ueth, void *packet, int length)
+static void r8152_tx_len(struct r8152 *tp, void *tx_desc, u32 *len)
+{
+	struct tx_desc *desc = tx_desc;
+
+	desc->opts1 |= cpu_to_le32(*len);
+}
+
+static void r8157_tx_len(struct r8152 *tp, void *tx_desc, u32 *len)
+{
+	struct tx_desc_v2 *desc = tx_desc;
+
+	desc->opts3 = cpu_to_le32(tx_v2_set_len(*len));
+	desc->opts4 = cpu_to_le32(TX_SIG);
+}
+
+static void rtl_tx_len(struct r8152 *tp, void *tx_desc, u32 *len)
+{
+	switch (tp->version) {
+	case RTL_TEST_02:
+	case RTL_VER_16:
+	case RTL_VER_17:
+		return r8157_tx_len(tp, tx_desc, len);
+	default:
+		return r8152_tx_len(tp, tx_desc, len);
+	}
+}
+
+static void r8152_rx_len(struct r8152 *tp, void *desc, u32 *len)
+{
+	struct rx_desc *d = desc;
+
+	*len = le32_to_cpu(d->opts1) & RX_LEN_MASK;
+}
+
+static void r8157_rx_len(struct r8152 *tp, void *desc, u32 *len)
+{
+	struct rx_desc_v2 *d = desc;
+
+	*len = rx_v2_get_len(le32_to_cpu(d->opts1));
+}
+
+static void rtl_rx_len(struct r8152 *tp, void *desc, u32 *len)
+{
+	switch (tp->version) {
+	case RTL_TEST_02:
+	case RTL_VER_16:
+	case RTL_VER_17:
+		r8157_rx_len(tp, desc, len);
+		break;
+	default:
+		r8152_rx_len(tp, desc, len);
+		break;
+	}
+}
+
+static int r8152_send_common(struct udevice *dev, void *packet, int length)
 {
+	struct r8152 *tp = dev_get_priv(dev);
+	struct ueth_data *ueth = &tp->ueth;
 	struct usb_device *udev = ueth->pusb_dev;
 	u32 opts1, opts2 = 0;
 	int err;
@@ -2672,11 +3384,13 @@ static int r8152_send_common(struct ueth_data *ueth, void *packet, int length)
 
 	debug("** %s(), len %d\n", __func__, length);
 
-	opts1 = length | TX_FS | TX_LS;
+	opts1 = TX_FS | TX_LS;
 
 	tx_desc->opts2 = cpu_to_le32(opts2);
 	tx_desc->opts1 = cpu_to_le32(opts1);
 
+	rtl_tx_len(tp, tx_desc, &length);
+
 	memcpy(msg + tp->tx_desc_size, (void *)packet, length);
 
 	err = usb_bulk_msg(udev, usb_sndbulkpipe(udev, ueth->ep_out),
@@ -2708,9 +3422,7 @@ void r8152_eth_stop(struct udevice *dev)
 
 int r8152_eth_send(struct udevice *dev, void *packet, int length)
 {
-	struct r8152 *tp = dev_get_priv(dev);
-
-	return r8152_send_common(&tp->ueth, packet, length);
+	return r8152_send_common(dev, packet, length);
 }
 
 int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp)
@@ -2720,7 +3432,7 @@ int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 	uint8_t *ptr;
 	int ret, len;
 	struct rx_desc *rx_desc;
-	u16 packet_len;
+	u32 packet_len;
 
 	len = usb_ether_get_rx_bytes(ueth, &ptr);
 	debug("%s: first try, len=%d\n", __func__, len);
@@ -2736,7 +3448,7 @@ int r8152_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 	}
 
 	rx_desc = (struct rx_desc *)ptr;
-	packet_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
+	rtl_rx_len(tp, rx_desc, &packet_len);
 	packet_len -= CRC_SIZE;
 
 	if (packet_len > len - (tp->rx_desc_size + CRC_SIZE)) {
@@ -2844,6 +3556,8 @@ static const struct usb_device_id r8152_eth_id_table[] = {
 	{ USB_DEVICE(0x0bda, 0x8153) },
 	{ USB_DEVICE(0x0bda, 0x8155) },
 	{ USB_DEVICE(0x0bda, 0x8156) },
+	{ USB_DEVICE(0x0bda, 0x8157) },
+	{ USB_DEVICE(0x0bda, 0xA157) },
 
 	/* Samsung */
 	{ USB_DEVICE(0x04e8, 0xa101) },
diff --git a/drivers/usb/eth/r8152.h b/drivers/usb/eth/r8152.h
index 3ced02a3b1..f8e68806fe 100644
--- a/drivers/usb/eth/r8152.h
+++ b/drivers/usb/eth/r8152.h
@@ -25,6 +25,7 @@
 #define PLA_CFG_WOL		0xc0b6
 #define PLA_TEREDO_CFG		0xc0bc
 #define PLA_MAR			0xcd00
+#define USB_MISC_3		0xcffe
 #define PLA_BACKUP		0xd000
 #define PLA_BDC_CR		0xd1a0
 #define PLA_TEREDO_TIMER	0xd2cc
@@ -129,6 +130,12 @@
 #define USB_BMU_CONFIG		0xd4b4
 #define USB_U1U2_TIMER		0xd4da
 #define USB_FW_TASK		0xd4e8	/* RTL8153B */
+#define USB_ADV_ADDR		0xd5d6
+#define USB_ADV_DATA		0xd5d8
+#define USB_ADV_CMD		0xd5dc
+#define USB_TGPHY_ADDR		0xd630
+#define USB_TGPHY_DATA		0xd632
+#define USB_TGPHY_CMD		0xd634
 #define USB_UPS_CTRL		0xd800
 #define USB_POWER_CUT		0xd80a
 #define USB_MISC_0		0xd81a
@@ -235,6 +242,9 @@
 /* PLA_FMC */
 #define FMC_FCR_MCU_EN		0x0001
 
+/* USB_MISC_3 */
+#define SWDT_TIMEOUT_SW_RST	BIT(3)
+
 /* PLA_EEEP_CR */
 #define EEEP_CR_EEEP_TX		0x0002
 
@@ -433,6 +443,16 @@
 /* USB_FW_TASK */
 #define FC_PATCH_TASK		BIT(1)
 
+/* USB_ADV_CMD */
+#define ADV_CMD_BUSY		BIT(0)
+#define ADV_CMD_WR		BIT(1)
+#define ADV_CMD_BMU		0
+#define ADV_CMD_IP		BIT(2)
+
+/* USB_TGPHY_CMD */
+#define TGPHY_CMD_BUSY		BIT(0)
+#define TGPHY_CMD_WR		BIT(1)
+
 /* USB_UPS_CTRL */
 #define POWER_CUT		0x0100
 
@@ -466,6 +486,7 @@
 #define CDC_ECM_EN		BIT(3)
 #define RX_AGG_DISABLE		0x0010
 #define RX_ZERO_EN		0x0080
+#define RX_HDR32_EN		BIT(10)
 
 /* USB_U2P3_CTRL */
 #define U2P3_ENABLE		0x0001
@@ -649,6 +670,7 @@
 #define SPEED_100               100
 #define SPEED_1000              1000
 #define SPEED_2500              2500
+#define SPEED_5000              5000
 
 #define SPEED_UNKNOWN           -1
 
@@ -737,6 +759,41 @@ struct tx_desc {
 #define TX_VLAN_TAG		BIT(16)
 };
 
+struct rx_desc_v2 {
+	__le32 opts1;
+#define RX_LEN_MASK_2			0xfffe0000
+#define rx_v2_get_len(x)		(((x) & RX_LEN_MASK_2) >> 17)
+#define RX_VLAN_TAG_2			BIT(3)
+#define RX_VER_MASK			0x3
+
+	__le32 opts2;
+
+	__le32 opts3;
+#define IPF_2				BIT(26) /* IP checksum fail */
+#define UDPF_2				BIT(25) /* UDP checksum fail */
+#define TCPF_2				BIT(24) /* TCP checksum fail */
+#define RD_IPV6_CS_2			BIT(15)
+#define RD_IPV4_CS_2			BIT(14)
+#define RD_UDP_CS_2			BIT(11)
+#define RD_TCP_CS_2			BIT(10)
+
+	__le32 opts4;
+};
+
+struct tx_desc_v2 {
+	__le32 opts1;
+
+	__le32 opts2;
+#define TCPHO_MAX_2		0x3ffU
+
+	__le32 opts3;
+#define tx_v2_set_len(x)	((x) << 4)
+
+	__le32 opts4;
+#define TX_SIG			(0x15 << 27)
+};
+
+
 enum rtl_version {
 	RTL_VER_UNKNOWN = 0,
 	RTL_VER_01,
@@ -757,9 +814,19 @@ enum rtl_version {
 	RTL_VER_14,
 	RTL_VER_15,
 
+	RTL_TEST_02,
+	RTL_VER_16,
+	RTL_VER_17,
+
 	RTL_VER_MAX
 };
 
+enum adv_access_type {
+	ADV_TYPE_BMU = 0,
+	ADV_TYPE_IP,
+	ADV_TYPE_MAX
+};
+
 enum rtl_register_content {
 	_5000bps	= BIT(12),
 	_2500bps	= BIT(10),
@@ -844,6 +911,8 @@ void r8153_firmware(struct r8152 *tp);
 void r8153b_firmware(struct r8152 *tp);
 void r8153c_firmware(struct r8152 *tp);
 void r8156_ram_code(struct r8152 *tp, bool power_cut);
+void r8157_firmware(struct r8152 *tp, bool power_cut);
 
 void r8156_patch_code(struct r8152 *tp);
+void r8157_patch_code(struct r8152 *tp);
 #endif
diff --git a/drivers/usb/eth/r8152_fw.c b/drivers/usb/eth/r8152_fw.c
index 2c1099b7da..e00169ee61 100644
--- a/drivers/usb/eth/r8152_fw.c
+++ b/drivers/usb/eth/r8152_fw.c
@@ -881,6 +881,8 @@ static void rtl_clear_bp(struct r8152 *tp, u16 type)
 		bp_num = 8;
 		break;
 	case RTL_VER_14:
+	case RTL_VER_16:
+	case RTL_VER_17:
 	default:
 		ocp_write_word(tp, type, USB_BP2_EN, 0);
 		bp_num = 16;
@@ -2641,6 +2643,2475 @@ static int rtl_ram_code_speed_up(struct r8152 *tp, bool wait)
 			data = ram13;
 			len = sizeof(ram13);
 
+			if (r8156b_flash_used(tp)) {
+				ocp_word_set_bits(tp, MCU_TYPE_USB,
+						  USB_GPHY_CTRL,
+						  BYPASS_FLASH);
+			}
+		}
+	} else if (tp->version == RTL_VER_17) {
+		static u8 ram17[] = {
+			0x6c, 0xe8, 0x00, 0xa0,
+			0x36, 0xb4, 0x23, 0x80,
+			0x38, 0xb4, 0x01, 0x47,
+			0x36, 0xb4, 0x2e, 0xb8,
+			0x38, 0xb4, 0x01, 0x00,
+			0x6c, 0xe8, 0x00, 0xb0,
+			0x20, 0xb8, 0x90, 0x00,
+			0x6c, 0xe8, 0x00, 0xa0,
+			0x36, 0xb4, 0x16, 0xa0,
+			0x38, 0xb4, 0x00, 0x00,
+			0x36, 0xb4, 0x12, 0xa0,
+			0x38, 0xb4, 0x00, 0x00,
+			0x36, 0xb4, 0x14, 0xa0,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x10, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x1a, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x2a, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x32, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x3a, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x3e, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x44, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x4b, 0x80,
+			0x38, 0xb4, 0x04, 0xd5,
+			0x38, 0xb4, 0xb5, 0xc9,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x07, 0xd7,
+			0x38, 0xb4, 0x70, 0x40,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x82, 0x10,
+			0x38, 0xb4, 0x04, 0xd5,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x7a, 0x10,
+			0x38, 0xb4, 0xd0, 0x61,
+			0x38, 0xb4, 0x01, 0xd7,
+			0x38, 0xb4, 0xa5, 0x60,
+			0x38, 0xb4, 0x04, 0xd5,
+			0x38, 0xb4, 0xb2, 0xc9,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x04, 0xf0,
+			0x38, 0xb4, 0x04, 0xd5,
+			0x38, 0xb4, 0xb1, 0xc9,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x07, 0xd7,
+			0x38, 0xb4, 0x70, 0x60,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0xb0, 0x10,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0xc5, 0x10,
+			0x38, 0xb4, 0x07, 0xd7,
+			0x38, 0xb4, 0x05, 0x20,
+			0x38, 0xb4, 0x30, 0x80,
+			0x38, 0xb4, 0x5e, 0xd7,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x8c, 0x13,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0xff, 0x13,
+			0x38, 0xb4, 0x04, 0xc5,
+			0x38, 0xb4, 0x20, 0xce,
+			0x38, 0xb4, 0x01, 0xcf,
+			0x38, 0xb4, 0x0a, 0xd7,
+			0x38, 0xb4, 0x05, 0x40,
+			0x38, 0xb4, 0x02, 0xcf,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x99, 0x1b,
+			0x38, 0xb4, 0x80, 0xa9,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x4d, 0x14,
+			0x38, 0xb4, 0x7f, 0x90,
+			0x38, 0xb4, 0xa3, 0x91,
+			0x38, 0xb4, 0x06, 0x93,
+			0x38, 0xb4, 0x18, 0xb1,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x47, 0x21,
+			0x38, 0xb4, 0x7f, 0x90,
+			0x38, 0xb4, 0x09, 0x92,
+			0x38, 0xb4, 0xa3, 0x91,
+			0x38, 0xb4, 0x06, 0x93,
+			0x38, 0xb4, 0x18, 0xb1,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x3c, 0x20,
+			0x38, 0xb4, 0x07, 0xd7,
+			0x38, 0xb4, 0x21, 0x41,
+			0x38, 0xb4, 0x06, 0xd7,
+			0x38, 0xb4, 0xfc, 0x40,
+			0x38, 0xb4, 0x0a, 0xd7,
+			0x38, 0xb4, 0xb5, 0x40,
+			0x38, 0xb4, 0x28, 0xd0,
+			0x38, 0xb4, 0xc1, 0xd1,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x57, 0x80,
+			0x38, 0xb4, 0x7b, 0xd0,
+			0x38, 0xb4, 0xc5, 0xd1,
+			0x38, 0xb4, 0x03, 0xd5,
+			0x38, 0xb4, 0x08, 0xa1,
+			0x38, 0xb4, 0x05, 0xd5,
+			0x38, 0xb4, 0x03, 0x81,
+			0x38, 0xb4, 0x04, 0xd5,
+			0x38, 0xb4, 0x02, 0xa0,
+			0x38, 0xb4, 0x02, 0xa3,
+			0x38, 0xb4, 0x07, 0xd7,
+			0x38, 0xb4, 0x61, 0x40,
+			0x38, 0xb4, 0x03, 0xd5,
+			0x38, 0xb4, 0x01, 0x8b,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x8a, 0xc4,
+			0x38, 0xb4, 0x03, 0xd5,
+			0x38, 0xb4, 0x09, 0xcc,
+			0x38, 0xb4, 0x58, 0xcd,
+			0x38, 0xb4, 0x01, 0xaf,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x10, 0xbe,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x39, 0x17,
+			0x38, 0xb4, 0x19, 0xd7,
+			0x38, 0xb4, 0x6c, 0x60,
+			0x38, 0xb4, 0x04, 0xd7,
+			0x38, 0xb4, 0x5c, 0x64,
+			0x38, 0xb4, 0x5e, 0xd7,
+			0x38, 0xb4, 0x4d, 0x60,
+			0x38, 0xb4, 0xf8, 0xff,
+			0x38, 0xb4, 0x10, 0x9e,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x39, 0x17,
+			0x38, 0xb4, 0x19, 0xd7,
+			0x38, 0xb4, 0x6c, 0x60,
+			0x38, 0xb4, 0x04, 0xd7,
+			0x38, 0xb4, 0x1c, 0x63,
+			0x38, 0xb4, 0x5e, 0xd7,
+			0x38, 0xb4, 0x4d, 0x40,
+			0x38, 0xb4, 0xf8, 0xff,
+			0x38, 0xb4, 0x04, 0xd5,
+			0x38, 0xb4, 0x18, 0xaa,
+			0x38, 0xb4, 0x01, 0xa0,
+			0x38, 0xb4, 0xe0, 0xa1,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x39, 0x17,
+			0x38, 0xb4, 0x19, 0xd7,
+			0x38, 0xb4, 0xac, 0x7f,
+			0x38, 0xb4, 0x04, 0xd5,
+			0x38, 0xb4, 0x01, 0xa0,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x39, 0x17,
+			0x38, 0xb4, 0x04, 0xd7,
+			0x38, 0xb4, 0x5c, 0x5f,
+			0x38, 0xb4, 0x19, 0xd7,
+			0x38, 0xb4, 0xaf, 0x3a,
+			0x38, 0xb4, 0x91, 0x80,
+			0x38, 0xb4, 0x16, 0xf0,
+			0x38, 0xb4, 0x07, 0xd7,
+			0x38, 0xb4, 0x21, 0x61,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0xd8, 0x16,
+			0x38, 0xb4, 0x03, 0xd5,
+			0x38, 0xb4, 0x59, 0xcd,
+			0x38, 0xb4, 0x01, 0xaf,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0xdc, 0x0d,
+			0x38, 0xb4, 0x03, 0xd5,
+			0x38, 0xb4, 0x40, 0x80,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0xd8, 0x16,
+			0x38, 0xb4, 0x03, 0xd5,
+			0x38, 0xb4, 0x5a, 0xcd,
+			0x38, 0xb4, 0x01, 0xaf,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0xbf, 0x0d,
+			0x38, 0xb4, 0x04, 0xd5,
+			0x38, 0xb4, 0x08, 0xa0,
+			0x38, 0xb4, 0x04, 0xa2,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x39, 0x17,
+			0x38, 0xb4, 0x01, 0xd7,
+			0x38, 0xb4, 0xa0, 0x5f,
+			0x38, 0xb4, 0x03, 0xd5,
+			0x38, 0xb4, 0x82, 0xa0,
+			0x38, 0xb4, 0x00, 0xd5,
+			0x38, 0xb4, 0x1e, 0xd7,
+			0x38, 0xb4, 0x97, 0x40,
+			0x38, 0xb4, 0x78, 0xd0,
+			0x38, 0xb4, 0xaa, 0xd1,
+			0x38, 0xb4, 0x03, 0xf0,
+			0x38, 0xb4, 0x78, 0xd0,
+			0x38, 0xb4, 0xaa, 0xd1,
+			0x38, 0xb4, 0x07, 0xd7,
+			0x38, 0xb4, 0xc1, 0x40,
+			0x38, 0xb4, 0x06, 0xd7,
+			0x38, 0xb4, 0x9c, 0x40,
+			0x38, 0xb4, 0x0a, 0xd7,
+			0x38, 0xb4, 0x55, 0x40,
+			0x38, 0xb4, 0x10, 0xf0,
+			0x38, 0xb4, 0x06, 0xd7,
+			0x38, 0xb4, 0x65, 0x60,
+			0x38, 0xb4, 0x89, 0xcc,
+			0x38, 0xb4, 0x02, 0xf0,
+			0x38, 0xb4, 0x8b, 0xcc,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x7b, 0x0b,
+			0x38, 0xb4, 0x05, 0xd7,
+			0x38, 0xb4, 0xd0, 0x2a,
+			0x38, 0xb4, 0xca, 0x80,
+			0x38, 0xb4, 0x03, 0xf0,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x81, 0x0b,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x87, 0x0b,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0x53, 0x0c,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0xd7, 0x12,
+			0x36, 0xb4, 0x26, 0xa0,
+			0x38, 0xb4, 0x5d, 0x12,
+			0x36, 0xb4, 0x24, 0xa0,
+			0x38, 0xb4, 0x33, 0x20,
+			0x36, 0xb4, 0x22, 0xa0,
+			0x38, 0xb4, 0x3f, 0x21,
+			0x36, 0xb4, 0x20, 0xa0,
+			0x38, 0xb4, 0x4c, 0x14,
+			0x36, 0xb4, 0x06, 0xa0,
+			0x38, 0xb4, 0x98, 0x1b,
+			0x36, 0xb4, 0x04, 0xa0,
+			0x38, 0xb4, 0x8b, 0x13,
+			0x36, 0xb4, 0x02, 0xa0,
+			0x38, 0xb4, 0xc4, 0x10,
+			0x36, 0xb4, 0x00, 0xa0,
+			0x38, 0xb4, 0x79, 0x10,
+			0x36, 0xb4, 0x08, 0xa0,
+			0x38, 0xb4, 0x00, 0xff,
+			0x6c, 0xe8, 0x00, 0xa0,
+			0x36, 0xb4, 0x16, 0xa0,
+			0x38, 0xb4, 0x00, 0x00,
+			0x36, 0xb4, 0x12, 0xa0,
+			0x38, 0xb4, 0xf8, 0x0f,
+			0x36, 0xb4, 0x14, 0xa0,
+			0x38, 0xb4, 0x4d, 0xd0,
+			0x38, 0xb4, 0x00, 0x00,
+			0x38, 0xb4, 0x00, 0x00,
+			0x38, 0xb4, 0x00, 0x00,
+			0x38, 0xb4, 0x00, 0x00,
+			0x38, 0xb4, 0x00, 0x00,
+			0x38, 0xb4, 0x00, 0x00,
+			0x38, 0xb4, 0x00, 0x00,
+			0x36, 0xb4, 0x52, 0xa1,
+			0x38, 0xb4, 0xdc, 0x12,
+			0x36, 0xb4, 0x54, 0xa1,
+			0x38, 0xb4, 0xff, 0x3f,
+			0x36, 0xb4, 0x56, 0xa1,
+			0x38, 0xb4, 0xff, 0x3f,
+			0x36, 0xb4, 0x58, 0xa1,
+			0x38, 0xb4, 0xff, 0x3f,
+			0x36, 0xb4, 0x5a, 0xa1,
+			0x38, 0xb4, 0xff, 0x3f,
+			0x36, 0xb4, 0x5c, 0xa1,
+			0x38, 0xb4, 0xff, 0x3f,
+			0x36, 0xb4, 0x5e, 0xa1,
+			0x38, 0xb4, 0xff, 0x3f,
+			0x36, 0xb4, 0x60, 0xa1,
+			0x38, 0xb4, 0xff, 0x3f,
+			0x36, 0xb4, 0x50, 0xa1,
+			0x38, 0xb4, 0x01, 0x00,
+			0x6c, 0xe8, 0x00, 0xa0,
+			0x36, 0xb4, 0x16, 0xa0,
+			0x38, 0xb4, 0x20, 0x00,
+			0x36, 0xb4, 0x12, 0xa0,
+			0x38, 0xb4, 0x00, 0x00,
+			0x36, 0xb4, 0x14, 0xa0,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x10, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x1a, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x22, 0x80,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x23, 0x82,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x22, 0x83,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x4f, 0x85,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x09, 0x86,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x9f, 0x86,
+			0x38, 0xb4, 0x06, 0xd7,
+			0x38, 0xb4, 0xa9, 0x60,
+			0x38, 0xb4, 0x00, 0xd7,
+			0x38, 0xb4, 0xa1, 0x60,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x62, 0x09,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x62, 0x09,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x82, 0x09,
+			0x38, 0xb4, 0x0a, 0x80,
+			0x38, 0xb4, 0x1f, 0x0c,
+			0x38, 0xb4, 0x00, 0x0d,
+			0x38, 0xb4, 0xc0, 0x8d,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0xb5, 0x12,
+			0x38, 0xb4, 0x00, 0x18,
+			0x38, 0xb4, 0x99, 0x0f,
+			0x38, 0xb4, 0x02, 0xd7,
+			0x38, 0xb4, 0xc1, 0x61,
+			0x38, 0xb4, 0x02, 0xd7,
+			0x38, 0xb4, 0x60, 0x40,
+			0x38, 0xb4, 0x0d, 0xd7,
+			0x38, 0xb4, 0x5d, 0x41,
+			0x38, 0xb4, 0x01, 0xd7,
+			0x38, 0xb4, 0x1a, 0x61,
+			0x38, 0xb4, 0x10, 0x87,
+			0x38, 0xb4, 0x03, 0x0c,
+			0x38, 0xb4, 0x02, 0x15,
+			0x38, 0xb4, 0x80, 0x82,
+			0x38, 0xb4, 0x80, 0x87,
+			0x38, 0xb4, 0x03, 0x95,
+			0x38, 0xb4, 0x02, 0xf0,
+			0x38, 0xb4, 0x10, 0xa7,
+			0x38, 0xb4, 0x80, 0x95,
+			0x38, 0xb4, 0x03, 0x0c,
+			0x38, 0xb4, 0x02, 0x15,
+			0x38, 0xb4, 0x04, 0xa3,
+			0x38, 0xb4, 0x03, 0x95,
+			0x38, 0xb4, 0x1f, 0x0c,
+			0x38, 0xb4, 0x07, 0x0d,
+			0x38, 0xb4, 0xc0, 0x8d,
+			0x38, 0xb4, 0x00, 0x10,
+			0x38, 0xb4, 0xb5, 0x12,
+			0x38, 0xb4, 0x81, 0xcb,
+			0x38, 0xb4, 0x0c, 0xd7,
+			0x38, 0xb4, 0xe2, 0x48,
+			0x38, 0xb4, 0x06, 0xd7,
+			0x38, 0xb4, 0x7a, 0x40,
+			0x38, 0xb4, 0x0c, 0xd7,
+			0x38, 0xb4, 0x67, 0x48,
+			0x38, 0xb4, 0x06, 0xd7,
+			0x38, 0xb4, 0x5a, 0x40,
+			0x38, 0xb4, 0x10, 0x89,
+			0x38, 0xb4, 0x10, 0xa2,
+			0x38, 0xb4, 0x04, 0xd7,
+			0x38, 0xb4, 0x1c, 0x61,
+			0x38, 0xb4, 0xc0, 0x0c,
+			0x38, 0xb4, 0x80, 0x00,
+			0x38, 0xb4, 0x03, 0x0c,
+			0x38, 0xb4, 0x01, 0x01,
+			0x38, 0xb4, 0xe0, 0x0c,
+			0x38, 0xb4, 0xa0, 0x03,
+			0x38, 0xb4, 0xb5, 0xcc,
+			0x38, 0xb4, 0xc0, 0x0c,
+			0x38, 0xb4, 0x80, 0x00,
+			0x38, 0xb4, 0x03, 0x0c,
+			0x38, 0xb4, 0x02, 0x01,
+			0x38, 0xb4, 0xe0, 0x0c,
+			0x38, 0xb4, 0x40, 0x03,
+			0x38, 0xb4, 0x52, 0xcc,
+			0x38, 0xb4, 0x06, 0xd7,
+			0x38, 0xb4, 0xda, 0x42,
+			0x38, 0xb4, 0x03, 0x0c,
+			0x38, 0xb4, 0x02, 0x15,
+			0x38, 0xb4, 0x1f, 0x0c,
+			0x38, 0xb4, 0x1c, 0x0f,
+			0x38, 0xb4, 0x03, 0x95,
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+			0x38, 0xb4, 0x49, 0x0d,
+			0x38, 0xb4, 0x8f, 0xe3,
+			0x38, 0xb4, 0x1b, 0xa3,
+			0x38, 0xb4, 0x9f, 0x31,
+			0x38, 0xb4, 0xbf, 0x0e,
+			0x38, 0xb4, 0x00, 0x88,
+			0x38, 0xb4, 0x77, 0x02,
+			0x38, 0xb4, 0xbf, 0xf6,
+			0x38, 0xb4, 0x06, 0x88,
+			0x38, 0xb4, 0x77, 0x02,
+			0x38, 0xb4, 0xae, 0xf6,
+			0x38, 0xb4, 0xbf, 0x0c,
+			0x38, 0xb4, 0x00, 0x88,
+			0x38, 0xb4, 0x77, 0x02,
+			0x38, 0xb4, 0xbf, 0xed,
+			0x38, 0xb4, 0x06, 0x88,
+			0x38, 0xb4, 0x77, 0x02,
+			0x38, 0xb4, 0xee, 0xed,
+			0x38, 0xb4, 0x9c, 0x8f,
+			0x38, 0xb4, 0xff, 0x00,
+			0x38, 0xb4, 0x97, 0xef,
+			0x38, 0xb4, 0xfc, 0xfd,
+			0x38, 0xb4, 0xf8, 0x04,
+			0x38, 0xb4, 0xef, 0xf9,
+			0x38, 0xb4, 0xfb, 0x79,
+			0x38, 0xb4, 0x87, 0xbf,
+			0x38, 0xb4, 0x02, 0xf7,
+			0x38, 0xb4, 0x38, 0x78,
+			0x38, 0xb4, 0x20, 0x5c,
+			0x38, 0xb4, 0x0d, 0x00,
+			0x38, 0xb4, 0xa1, 0x4d,
+			0x38, 0xb4, 0x4a, 0x01,
+			0x38, 0xb4, 0x87, 0xbf,
+			0x38, 0xb4, 0x02, 0xf7,
+			0x38, 0xb4, 0x38, 0x78,
+			0x38, 0xb4, 0x07, 0x5c,
+			0x38, 0xb4, 0xe3, 0xff,
+			0x38, 0xb4, 0xa4, 0x8f,
+			0x38, 0xb4, 0x31, 0x1b,
+			0x38, 0xb4, 0x3a, 0x9f,
+			0x38, 0xb4, 0x48, 0x0d,
+			0x38, 0xb4, 0x8f, 0xe3,
+			0x38, 0xb4, 0x1b, 0xa5,
+			0x38, 0xb4, 0x9f, 0x31,
+			0x38, 0xb4, 0xbf, 0x31,
+			0x38, 0xb4, 0xfa, 0x87,
+			0x38, 0xb4, 0x78, 0x02,
+			0x38, 0xb4, 0xe3, 0x38,
+			0x38, 0xb4, 0xa6, 0x8f,
+			0x38, 0xb4, 0x31, 0x1b,
+			0x38, 0xb4, 0x24, 0x9f,
+			0x38, 0xb4, 0x48, 0x0d,
+			0x38, 0xb4, 0x8f, 0xe3,
+			0x38, 0xb4, 0x1b, 0xa7,
+			0x38, 0xb4, 0x9f, 0x31,
+			0x38, 0xb4, 0xbf, 0x1b,
+			0x38, 0xb4, 0xfd, 0x87,
+			0x38, 0xb4, 0x78, 0x02,
+			0x38, 0xb4, 0xe3, 0x38,
+			0x38, 0xb4, 0xa8, 0x8f,
+			0x38, 0xb4, 0x31, 0x1b,
+			0x38, 0xb4, 0x0e, 0x9f,
+			0x38, 0xb4, 0x88, 0xbf,
+			0x38, 0xb4, 0x02, 0x03,
+			0x38, 0xb4, 0xf6, 0x77,
+			0x38, 0xb4, 0x88, 0xbf,
+			0x38, 0xb4, 0x02, 0x09,
+			0x38, 0xb4, 0xf6, 0x77,
+			0x38, 0xb4, 0x00, 0xae,
+			0x38, 0xb4, 0xef, 0xff,
+			0x38, 0xb4, 0xfd, 0x97,
+			0x38, 0xb4, 0x04, 0xfc,
+			0x38, 0xb4, 0xef, 0xf8,
+			0x38, 0xb4, 0xfb, 0x79,
+			0x38, 0xb4, 0x80, 0xe0,
+			0x38, 0xb4, 0xad, 0x18,
+			0x38, 0xb4, 0x1c, 0x26,
+			0x38, 0xb4, 0x8f, 0xee,
+			0x38, 0xb4, 0x00, 0x9c,
+			0x38, 0xb4, 0x88, 0xbf,
+			0x38, 0xb4, 0x02, 0x00,
+			0x38, 0xb4, 0xed, 0x77,
+			0x38, 0xb4, 0x88, 0xbf,
+			0x38, 0xb4, 0x02, 0x06,
+			0x38, 0xb4, 0xed, 0x77,
+			0x38, 0xb4, 0x88, 0xbf,
+			0x38, 0xb4, 0x02, 0x03,
+			0x38, 0xb4, 0xed, 0x77,
+			0x38, 0xb4, 0x88, 0xbf,
+			0x38, 0xb4, 0x02, 0x09,
+			0x38, 0xb4, 0xed, 0x77,
+			0x38, 0xb4, 0xef, 0xff,
+			0x38, 0xb4, 0xfc, 0x97,
+			0x38, 0xb4, 0xf8, 0x04,
+			0x38, 0xb4, 0x80, 0xe0,
+			0x38, 0xb4, 0xf6, 0x40,
+			0x38, 0xb4, 0xe4, 0x25,
+			0x38, 0xb4, 0x40, 0x80,
+			0x38, 0xb4, 0x04, 0xfc,
+			0x38, 0xb4, 0xe0, 0xf8,
+			0x38, 0xb4, 0x4c, 0x80,
+			0x38, 0xb4, 0x25, 0xf6,
+			0x38, 0xb4, 0x80, 0xe4,
+			0x38, 0xb4, 0xfc, 0x4c,
+			0x38, 0xb4, 0x55, 0x04,
+			0x38, 0xb4, 0xba, 0xa4,
+			0x38, 0xb4, 0xa6, 0xf0,
+			0x38, 0xb4, 0xf0, 0x4a,
+			0x38, 0xb4, 0x4c, 0xa6,
+			0x38, 0xb4, 0xa6, 0xf0,
+			0x38, 0xb4, 0x66, 0x4e,
+			0x38, 0xb4, 0xb6, 0xa4,
+			0x38, 0xb4, 0xa4, 0x55,
+			0x38, 0xb4, 0x00, 0xb6,
+			0x38, 0xb4, 0x56, 0xac,
+			0x38, 0xb4, 0xac, 0x11,
+			0x38, 0xb4, 0xee, 0x56,
+			0x38, 0xb4, 0x4c, 0x80,
+			0x38, 0xb4, 0xaf, 0x3a,
+			0x38, 0xb4, 0x27, 0x06,
+			0x38, 0xb4, 0x88, 0xbf,
+			0x38, 0xb4, 0x02, 0x48,
+			0x38, 0xb4, 0xed, 0x77,
+			0x38, 0xb4, 0x03, 0xd2,
+			0x38, 0xb4, 0x83, 0xe0,
+			0x38, 0xb4, 0x0d, 0x8a,
+			0x38, 0xb4, 0xf6, 0x01,
+			0x38, 0xb4, 0x1b, 0x27,
+			0x38, 0xb4, 0xaa, 0x03,
+			0x38, 0xb4, 0x82, 0x01,
+			0x38, 0xb4, 0x83, 0xe0,
+			0x38, 0xb4, 0x0d, 0x89,
+			0x38, 0xb4, 0xf6, 0x01,
+			0x38, 0xb4, 0x1b, 0x27,
+			0x38, 0xb4, 0xaa, 0x03,
+			0x38, 0xb4, 0x82, 0x01,
+			0x38, 0xb4, 0x83, 0xe0,
+			0x38, 0xb4, 0x0d, 0x88,
+			0x38, 0xb4, 0xf6, 0x01,
+			0x38, 0xb4, 0x1b, 0x27,
+			0x38, 0xb4, 0xaa, 0x03,
+			0x38, 0xb4, 0x82, 0x07,
+			0x38, 0xb4, 0x88, 0xbf,
+			0x38, 0xb4, 0x02, 0x48,
+			0x38, 0xb4, 0xf6, 0x77,
+			0x38, 0xb4, 0x16, 0xaf,
+			0x38, 0xb4, 0x00, 0x15,
+			0x38, 0xb4, 0x6a, 0xa8,
+			0x36, 0xb4, 0x18, 0xb8,
+			0x38, 0xb4, 0x84, 0x1d,
+			0x36, 0xb4, 0x1a, 0xb8,
+			0x38, 0xb4, 0x60, 0x10,
+			0x36, 0xb4, 0x1c, 0xb8,
+			0x38, 0xb4, 0x23, 0x06,
+			0x36, 0xb4, 0x1e, 0xb8,
+			0x38, 0xb4, 0xef, 0x15,
+			0x36, 0xb4, 0x50, 0xb8,
+			0x38, 0xb4, 0xff, 0xff,
+			0x36, 0xb4, 0x52, 0xb8,
+			0x38, 0xb4, 0xff, 0xff,
+			0x36, 0xb4, 0x78, 0xb8,
+			0x38, 0xb4, 0xff, 0xff,
+			0x36, 0xb4, 0x84, 0xb8,
+			0x38, 0xb4, 0xff, 0xff,
+			0x36, 0xb4, 0x32, 0xb8,
+			0x38, 0xb4, 0x0f, 0x00,
+			0x36, 0xb4, 0x00, 0x00,
+			0x38, 0xb4, 0x00, 0x00,
+			0x6c, 0xe8, 0x00, 0xb0,
+			0x2e, 0xb8, 0x00, 0x00,
+			0x6c, 0xe8, 0x00, 0xa0,
+			0x36, 0xb4, 0x23, 0x80,
+			0x38, 0xb4, 0x00, 0x00,
+			0x6c, 0xe8, 0x00, 0xb0,
+			0x20, 0xb8, 0x00, 0x00,
+			0xff, 0xff, 0xff, 0xff};
+
+		code_ver = 0x0013;
+		fw_version = sram_read(tp, SRAM_GPHY_FW_VER);
+		if (fw_version < code_ver) {
+			data = ram17;
+			len = sizeof(ram17);
+
 			if (r8156b_flash_used(tp)) {
 				ocp_word_set_bits(tp, MCU_TYPE_USB,
 						  USB_GPHY_CTRL,
@@ -6490,6 +8961,11 @@ void r8156_ram_code(struct r8152 *tp, bool power_cut)
 	rtl_reset_ocp_base(tp);
 }
 
+void r8157_firmware(struct r8152 *tp, bool power_cut)
+{
+	rtl_ram_code_speed_up(tp, !power_cut);
+}
+
 void r8156_patch_code(struct r8152 *tp)
 {
 	if (tp->version == RTL_VER_11) {
@@ -7753,3 +10229,259 @@ void r8156_patch_code(struct r8152 *tp)
 
 	rtl_reset_ocp_base(tp);
 }
+
+void r8157_patch_code(struct r8152 *tp)
+{
+	if (tp->version == RTL_VER_17) {
+		static u8 usb_patch_17[] = {
+			0x10, 0xe0, 0x20, 0xe0,
+			0x22, 0xe0, 0x71, 0xe0,
+			0x75, 0xe0, 0x9b, 0xe0,
+			0xbf, 0xe0, 0xd8, 0xe0,
+			0xfb, 0xe0, 0xff, 0xe0,
+			0x08, 0xe1, 0x1c, 0xe1,
+			0x1e, 0xe1, 0x29, 0xe1,
+			0x4c, 0xe1, 0x52, 0xe1,
+			0x0d, 0xc6, 0xc0, 0x71,
+			0x91, 0x48, 0xc0, 0x99,
+			0x11, 0x48, 0xc0, 0x99,
+			0x09, 0xc6, 0x09, 0xc1,
+			0xc0, 0x99, 0x05, 0xc6,
+			0x02, 0xc1, 0x00, 0xb9,
+			0x80, 0x33, 0x86, 0xd4,
+			0x6c, 0xe4, 0x00, 0xb9,
+			0x47, 0x68, 0x02, 0xc6,
+			0x00, 0xbe, 0x32, 0x19,
+			0x27, 0xc2, 0x40, 0x71,
+			0x92, 0x49, 0x0e, 0xf1,
+			0x91, 0x49, 0x0c, 0xf1,
+			0x27, 0xc2, 0x01, 0x02,
+			0xc0, 0x9a, 0x00, 0x19,
+			0x18, 0x48, 0xc2, 0x99,
+			0x1a, 0xc1, 0xc4, 0x99,
+			0xc6, 0x9b, 0x16, 0xff,
+			0x3d, 0xe0, 0x17, 0xc2,
+			0x40, 0x73, 0xb0, 0x49,
+			0x28, 0xf0, 0x14, 0xc2,
+			0x40, 0x73, 0xbf, 0x49,
+			0x19, 0xf1, 0x11, 0xc2,
+			0x50, 0x73, 0xb0, 0x49,
+			0x15, 0xf1, 0x0e, 0xc3,
+			0x0e, 0xc2, 0x60, 0x9a,
+			0x40, 0x1a, 0x28, 0x21,
+			0x28, 0x25, 0x62, 0x9a,
+			0x17, 0xff, 0x28, 0xe0,
+			0xe0, 0x01, 0x44, 0xd8,
+			0x0c, 0xd2, 0x74, 0xd3,
+			0x00, 0xd4, 0x70, 0xd3,
+			0xe8, 0xd4, 0x04, 0xc7,
+			0xff, 0xff, 0xf2, 0xb8,
+			0x28, 0xe4, 0xfc, 0xc2,
+			0x03, 0x02, 0xc0, 0x9a,
+			0x00, 0x19, 0xc2, 0x99,
+			0x13, 0x48, 0xc4, 0x99,
+			0xf6, 0xc3, 0xc6, 0x9b,
+			0x16, 0xff, 0x12, 0xe0,
+			0xf3, 0xc2, 0x40, 0x71,
+			0x1f, 0x48, 0x40, 0x99,
+			0xf0, 0xc2, 0x01, 0x19,
+			0x42, 0x99, 0x01, 0x19,
+			0x40, 0x89, 0xe6, 0xc3,
+			0xe6, 0xc2, 0x60, 0x9a,
+			0x40, 0x1a, 0x28, 0x21,
+			0x28, 0x25, 0x62, 0x9a,
+			0x17, 0xff, 0x02, 0xc2,
+			0x00, 0xba, 0x1c, 0x2d,
+			0x00, 0x75, 0xd8, 0x49,
+			0x02, 0xc4, 0x00, 0xbc,
+			0x36, 0xc6, 0x04, 0xf0,
+			0x02, 0xc0, 0x00, 0xb8,
+			0xb2, 0xa0, 0x1e, 0xc7,
+			0xf3, 0x66, 0xb1, 0x3b,
+			0xf3, 0x8e, 0x00, 0x16,
+			0x03, 0xf1, 0x08, 0xe8,
+			0x04, 0xe0, 0x02, 0xc6,
+			0x00, 0xbe, 0xaa, 0xa1,
+			0x02, 0xc7, 0x00, 0xbf,
+			0x82, 0xa1, 0x11, 0xc5,
+			0xa2, 0x76, 0x6a, 0x27,
+			0x6a, 0x23, 0x0e, 0xc7,
+			0x37, 0x40, 0x09, 0xf1,
+			0x0c, 0xc5, 0x0c, 0xc6,
+			0xc0, 0x9d, 0x08, 0x1d,
+			0xd8, 0x22, 0xd8, 0x26,
+			0xc2, 0x9d, 0x17, 0xff,
+			0x80, 0xff, 0x80, 0xcb,
+			0x80, 0xc3, 0x00, 0xc4,
+			0xe8, 0xd4, 0x70, 0xd3,
+			0x24, 0xc3, 0x60, 0x74,
+			0xcf, 0x49, 0x0e, 0xf1,
+			0x1c, 0xc3, 0x60, 0x74,
+			0xcf, 0x49, 0x16, 0xf0,
+			0x44, 0x22, 0x4c, 0x26,
+			0x17, 0xc3, 0x60, 0x65,
+			0xd5, 0x22, 0xd5, 0x26,
+			0x25, 0x40, 0x0e, 0xf1,
+			0x0d, 0xe0, 0xcf, 0x48,
+			0x60, 0x9c, 0x0f, 0xc3,
+			0x62, 0x74, 0x11, 0x1d,
+			0x62, 0x9d, 0x0c, 0xc3,
+			0x62, 0x75, 0xd3, 0x48,
+			0x62, 0x9d, 0x07, 0xc3,
+			0x62, 0x9c, 0x02, 0xc3,
+			0x00, 0xbb, 0x14, 0x09,
+			0x44, 0xd6, 0xf4, 0xcb,
+			0x3c, 0xd5, 0x04, 0xb7,
+			0xf2, 0xb8, 0x3a, 0xc2,
+			0x40, 0x71, 0x9f, 0x49,
+			0x06, 0xf1, 0x85, 0xc2,
+			0x50, 0x71, 0x90, 0x49,
+			0x02, 0xf1, 0x0f, 0xe0,
+			0x31, 0xc2, 0x40, 0x71,
+			0x9f, 0x48, 0x40, 0x99,
+			0x82, 0xc2, 0x00, 0x1b,
+			0x40, 0x8b, 0xef, 0xc2,
+			0x40, 0x73, 0xbf, 0x48,
+			0x40, 0x9b, 0x02, 0xc2,
+			0x00, 0xba, 0xfc, 0x5b,
+			0x02, 0xc6, 0x00, 0xbe,
+			0x0e, 0x5c, 0x21, 0xc6,
+			0x21, 0xc1, 0xc0, 0x99,
+			0x20, 0xc0, 0xc6, 0x98,
+			0x16, 0xff, 0xc2, 0x70,
+			0x0d, 0x20, 0x0d, 0x24,
+			0x82, 0x49, 0x07, 0xf0,
+			0x13, 0xc6, 0xc0, 0x71,
+			0x9c, 0x20, 0x9c, 0x24,
+			0x03, 0x11, 0x0a, 0xf1,
+			0x0d, 0xc6, 0xc0, 0x71,
+			0x9c, 0x24, 0x06, 0x11,
+			0x05, 0xf1, 0x0a, 0xc0,
+			0x00, 0x71, 0x1f, 0x48,
+			0x00, 0x99, 0x05, 0xc0,
+			0x02, 0xc1, 0x00, 0xb9,
+			0xb4, 0x50, 0xba, 0xd4,
+			0x20, 0xd4, 0x74, 0xd3,
+			0x80, 0xcf, 0x0c, 0xc7,
+			0xff, 0xff, 0x04, 0xc6,
+			0x02, 0xc5, 0x00, 0xbd,
+			0xa4, 0x58, 0x80, 0x90,
+			0x08, 0xc5, 0x08, 0xc6,
+			0xa0, 0x77, 0xc0, 0x9f,
+			0x07, 0xb0, 0x02, 0xc6,
+			0x00, 0xbe, 0xae, 0x5a,
+			0xd8, 0xc7, 0x18, 0x90,
+			0x11, 0xc2, 0x16, 0x40,
+			0x0c, 0xf0, 0x0f, 0xc2,
+			0x16, 0x40, 0x09, 0xf0,
+			0x0d, 0xc2, 0x16, 0x40,
+			0x06, 0xf0, 0x0b, 0xc2,
+			0x16, 0x40, 0x02, 0xc2,
+			0x00, 0xba, 0x42, 0x45,
+			0x02, 0xc2, 0x00, 0xba,
+			0x46, 0x45, 0x18, 0xc0,
+			0x1a, 0xc0, 0x1c, 0xc0,
+			0x14, 0xc0, 0x02, 0xc1,
+			0x00, 0xb9, 0x1c, 0x64,
+			0x0a, 0xc0, 0x00, 0x72,
+			0xa2, 0x49, 0x03, 0xf0,
+			0x25, 0x48, 0x00, 0x9a,
+			0x05, 0xc0, 0x02, 0xc2,
+			0x00, 0xba, 0x94, 0xd0,
+			0x26, 0xd4, 0x06, 0xd4,
+			0x20, 0xc6, 0xc6, 0x75,
+			0xd5, 0x49, 0x16, 0xf0,
+			0xd5, 0x48, 0xc6, 0x9d,
+			0x1b, 0xc5, 0xa0, 0x76,
+			0x11, 0x1c, 0xa0, 0x9c,
+			0x18, 0xc4, 0x82, 0x63,
+			0xb4, 0x48, 0xb5, 0x48,
+			0xb6, 0x48, 0xb7, 0x48,
+			0x82, 0x8b, 0xa0, 0x9e,
+			0x11, 0xc4, 0x80, 0x73,
+			0xb0, 0x49, 0x04, 0xf0,
+			0xb2, 0x49, 0x02, 0xf0,
+			0x05, 0xe0, 0xf6, 0x65,
+			0x02, 0xc6, 0x00, 0xbe,
+			0xe6, 0x04, 0x02, 0xc6,
+			0x00, 0xbe, 0x5a, 0x05,
+			0x20, 0xd4, 0x3e, 0xd5,
+			0x04, 0xb7, 0x26, 0xd4,
+			0x06, 0xc1, 0x40, 0x1a,
+			0x20, 0x9a, 0x02, 0xc2,
+			0x00, 0xba, 0xb2, 0xab,
+			0x18, 0x90, 0x0e, 0xc7,
+			0xe0, 0x75, 0xd6, 0x48,
+			0xe0, 0x9d, 0x0b, 0xc7,
+			0x00, 0x1d, 0xe0, 0x8d,
+			0x09, 0xc7, 0xe0, 0x75,
+			0xdf, 0x48, 0xe0, 0x9d,
+			0x02, 0xc1, 0x00, 0xb9,
+			0xe4, 0x4f, 0xe8, 0xd4,
+			0x28, 0xe4, 0xf2, 0xb8};
+		static u8 pla_patch_17[] = {
+			0x10, 0xe0, 0x0f, 0xe0,
+			0x0e, 0xe0, 0x0d, 0xe0,
+			0x0c, 0xe0, 0x0b, 0xe0,
+			0x0a, 0xe0, 0x09, 0xe0,
+			0x08, 0xe0, 0x07, 0xe0,
+			0x06, 0xe0, 0x05, 0xe0,
+			0x04, 0xe0, 0x03, 0xe0,
+			0x02, 0xe0, 0x01, 0xe0,
+			0x08, 0xc6, 0xc0, 0x71,
+			0x90, 0x49, 0x07, 0xf0,
+			0x05, 0xc6, 0x02, 0xc1,
+			0x00, 0xb9, 0x80, 0x1e,
+			0xc8, 0xe0, 0x10, 0xd4,
+			0x02, 0xc6, 0x00, 0xbe,
+			0x86, 0x1e, 0x00, 0x00};
+		u8 new_ver;
+
+		rtl_fw_ver_erase(tp);
+
+		new_ver = 3;
+		if (rtl_check_fw_ver_ok(tp, USB_FW_USB_VER, new_ver)) {
+			rtl_clear_bp(tp, MCU_TYPE_USB);
+
+			generic_ocp_write(tp, 0xe600, 0xff,
+					  sizeof(usb_patch_17), usb_patch_17,
+					  MCU_TYPE_USB);
+
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0xf000);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_0, 0x337e);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_1, 0x192a);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_2, 0x269a);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_3, 0xc632);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_4, 0xa108);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_5, 0x08f4);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_6, 0x5be6);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_7, 0x50b2);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_8, 0x0000);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_9, 0x0000);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_10, 0x453e);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_11, 0x0000);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_12, 0xd092);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_13, 0x04e4);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_14, 0xa93e);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP_15, 0x5074);
+			ocp_write_word(tp, MCU_TYPE_USB, USB_BP2_EN, 0x74ff);
+			ocp_write_byte(tp, MCU_TYPE_USB, USB_FW_USB_VER,
+				       new_ver);
+		}
+
+		new_ver = 1;
+		if (rtl_check_fw_ver_ok(tp, USB_FW_PLA_VER, new_ver)) {
+			rtl_clear_bp(tp, MCU_TYPE_PLA);
+
+			generic_ocp_write(tp, 0xf800, 0xff,
+					  sizeof(pla_patch_17), pla_patch_17,
+					  MCU_TYPE_PLA);
+
+			ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0x8000);
+			ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_0, 0x1e7e);
+			ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0001);
+			ocp_write_byte(tp, MCU_TYPE_USB, USB_FW_PLA_VER,
+				       new_ver);
+		}
+	}
+}
-- 
2.43.0