[PATCH V2 1/5] mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API

[Peng Fan (OSS)]

From: Peng Fan <peng.fan at nxp.com>

With partition reset supported for i.MX8QM/QXP/95 and etc, when linux
mmc runtime suspended, the mmc clks are gated off. While at same time
system controller reset Cortex-A cores because of various reasons(
WDOG timeout and etc), with SPL run again, only enable PER clk is not
enough, also need to enable AHB/IPG clk, here use clk bulk API to enable
all the clocks.

Signed-off-by: Peng Fan <peng.fan at nxp.com>
---

V2:
 Update commit log and use clk bulk API per Fabio.

 drivers/mmc/fsl_esdhc_imx.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 03de7dcd505..0ced796ff49 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -148,6 +148,7 @@ struct fsl_esdhc_priv {
 	struct fsl_esdhc *esdhc_regs;
 	unsigned int sdhc_clk;
 	struct clk per_clk;
+	struct clk_bulk clk_bulk;
 	unsigned int clock;
 	unsigned int mode;
 #if !CONFIG_IS_ENABLED(DM_MMC)
@@ -1521,14 +1522,21 @@ static int fsl_esdhc_probe(struct udevice *dev)
 
 #if CONFIG_IS_ENABLED(CLK)
 	/* Assigned clock already set clock */
-	ret = clk_get_by_name(dev, "per", &priv->per_clk);
+	ret = clk_get_bulk(dev, &priv->clk_bulk);
 	if (ret) {
-		printf("Failed to get per_clk\n");
+		dev_err(dev, "Failed to get clks: %d\n", ret);
 		return ret;
 	}
-	ret = clk_enable(&priv->per_clk);
+
+	ret = clk_enable_bulk(&priv->clk_bulk);
 	if (ret) {
-		printf("Failed to enable per_clk\n");
+		dev_err(dev, "Failed to enable clks: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_get_by_name(dev, "per", &priv->per_clk);
+	if (ret) {
+		printf("Failed to get per_clk\n");
 		return ret;
 	}
 
-- 
2.35.3