[PATCH 14/19] configs: nand2_defconfig: Enable configs for nand boot

Tue Oct 8 11:43:02 CEST 2024

> -----Original Message-----
> From: Michael Nazzareno Trimarchi <michael at amarulasolutions.com>
> Sent: Tuesday, 8 October 2024 1:01 am
> To: Maniyam, Dinesh <dinesh.maniyam at intel.com>
> Cc: Tom Rini <trini at konsulko.com>; u-boot at lists.denx.de; Marek
> <marex at denx.de>; Simon <simon.k.r.goldschmidt at gmail.com>; Dario Binacchi
> <dario.binacchi at amarulasolutions.com>; Johan Jonker <jbx6244 at gmail.com>;
> Michal Simek <michal.simek at amd.com>; Arseniy Krasnov
> <avkrasnov at salutedevices.com>; Alexander Dahl <ada at thorsis.com>; William
> Zhang <william.zhang at broadcom.com>; Igor Prusov
> <ivprusov at salutedevices.com>; Chee, Tien Fong <tien.fong.chee at intel.com>;
> Hea, Kok Kiang <kok.kiang.hea at intel.com>; Ng, Boon Khai
> <boon.khai.ng at intel.com>; Yuslaimi, Alif Zakuan
> <alif.zakuan.yuslaimi at intel.com>; Zamri, Muhammad Hazim Izzat
> <muhammad.hazim.izzat.zamri at intel.com>; Meng, Tingting
> <tingting.meng at intel.com>; Lim, Jit Loon <jit.loon.lim at intel.com>; Tang, Sieu
> Mun <sieu.mun.tang at intel.com>
> Subject: Re: [PATCH 14/19] configs: nand2_defconfig: Enable configs for nand
> boot
> 
> Hi
> 
> On Mon, Oct 7, 2024 at 4:23 AM Maniyam, Dinesh <dinesh.maniyam at intel.com>
> wrote:
> >
> > > -----Original Message-----
> > > From: Tom Rini <trini at konsulko.com>
> > > Sent: Saturday, 5 October 2024 11:21 pm
> > > To: Michael Nazzareno Trimarchi <michael at amarulasolutions.com>
> > > Cc: Maniyam, Dinesh <dinesh.maniyam at intel.com>;
> > > u-boot at lists.denx.de; Marek <marex at denx.de>; Simon
> > > <simon.k.r.goldschmidt at gmail.com>; Dario Binacchi
> > > <dario.binacchi at amarulasolutions.com>; Johan Jonker
> > > <jbx6244 at gmail.com>; Michal Simek <michal.simek at amd.com>; Arseniy
> > > Krasnov <avkrasnov at salutedevices.com>; Alexander Dahl
> > > <ada at thorsis.com>; William Zhang <william.zhang at broadcom.com>; Igor
> > > Prusov <ivprusov at salutedevices.com>; Chee, Tien Fong
> > > <tien.fong.chee at intel.com>; Hea, Kok Kiang
> > > <kok.kiang.hea at intel.com>; Ng, Boon Khai <boon.khai.ng at intel.com>;
> > > Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at intel.com>; Teik Heng
> > > <teik.heng.chong at intel.com>; Zamri, Muhammad Hazim Izzat
> > > <muhammad.hazim.izzat.zamri at intel.com>;
> > > Meng, Tingting <tingting.meng at intel.com>; Lim, Jit Loon
> > > <jit.loon.lim at intel.com>; Tang, Sieu Mun <sieu.mun.tang at intel.com>
> > > Subject: Re: [PATCH 14/19] configs: nand2_defconfig: Enable configs
> > > for nand boot
> > >
> > > On Sat, Oct 05, 2024 at 05:16:33PM +0200, Michael Nazzareno Trimarchi
> wrote:
> > > > Hi
> > > >
> > > > On Thu, Sep 19, 2024 at 5:56 AM <dinesh.maniyam at intel.com> wrote:
> > > > >
> > > > > From: Dinesh Maniyam <dinesh.maniyam at intel.com>
> > > > >
> > > > > This patch is to enable configs for nand boot.
> > > > >
> > > > > Signed-off-by: Dinesh Maniyam <dinesh.maniyam at intel.com>
> > > > > ---
> > > > >  configs/socfpga_agilex5_nand2_defconfig | 169
> > > > > ++++++++++++++++++++++++
> > > > >  1 file changed, 169 insertions(+)  create mode 100644
> > > > > configs/socfpga_agilex5_nand2_defconfig
> > > > >
> > > > > diff --git a/configs/socfpga_agilex5_nand2_defconfig
> > > > > b/configs/socfpga_agilex5_nand2_defconfig
> > > > > new file mode 100644
> > > > > index 0000000000..9e5a75194a
> > > > > --- /dev/null
> > > > > +++ b/configs/socfpga_agilex5_nand2_defconfig
> > > > > @@ -0,0 +1,169 @@
> > > > > +CONFIG_ARM=y
> > > > > +CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
> > > > > +CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000
> > > > > +CONFIG_ARCH_SOCFPGA=y
> > > > > +CONFIG_TEXT_BASE=0x80200000
> > > > > +CONFIG_SYS_MALLOC_F_LEN=0x4000
> > > > > +CONFIG_NR_DRAM_BANKS=2
> > > > > +CONFIG_ENV_SIZE=0x2000
> > > > > +CONFIG_ENV_OFFSET=0x04100000
> > > > > +CONFIG_DM_GPIO=y
> > > > > +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex5_socdk"
> > > > > +CONFIG_SPL_MMC=y
> > > > > +CONFIG_TARGET_SOCFPGA_AGILEX5_SOCDK=y
> > > > > +CONFIG_TARGET_SOCFPGA_AGILEX5_NAND2=y
> > > > > +CONFIG_QPDS_HPS_HANDOFF=y
> > > > > +CONFIG_IDENT_STRING="socfpga_agilex5"
> > > > > +CONFIG_SPL_FS_FAT=y
> > > > > +CONFIG_DISTRO_DEFAULTS=y
> > > > > +CONFIG_FIT=y
> > > > > +CONFIG_SPL_FIT_SIGNATURE=y
> > > > > +CONFIG_SPL_LOAD_FIT=y
> > > > > +CONFIG_SPL_LOAD_FIT_ADDRESS=0x82000000
> > > > > +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_QSPI_BOOT=y
> > > > > +CONFIG_BOOTDELAY=5
> > > > > +CONFIG_USE_BOOTARGS=y
> > > > > +CONFIG_BOOTARGS="earlycon panic=-1 root=${nandroot} rw rootwait
> > > rootfstype=ubifs ubi.mtd=1"
> > > > > +CONFIG_LEGACY_IMAGE_FORMAT=y
> > > > > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_CRC32=y
> > > > > +CONFIG_SPL_CACHE=y CONFIG_SPL_ATF=y
> > > > > +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
> > > > > +CONFIG_SYS_PROMPT="SOCFPGA_AGILEX5 # "
> > > > > +CONFIG_CMD_NVEDIT_SELECT=y
> > > > > +CONFIG_CMD_MEMTEST=y
> > > > > +CONFIG_CMD_GPIO=y
> > > > > +CONFIG_CMD_I2C=n
> > > > > +CONFIG_CMD_MMC=y
> > > > > +CONFIG_CMD_SF=y
> > > > > +CONFIG_PHY=y
> > > > > +CONFIG_SPL_PHY=y
> > > > > +CONFIG_NOP_PHY=y
> > > > > +CONFIG_SPL_NOP_PHY=y
> > > > > +CONFIG_PHY_CADENCE_COMBOPHY=n
> > > > > +CONFIG_SPL_PHY_CADENCE_COMBOPHY=n
> > > > > +CONFIG_MMC=y
> > > > > +CONFIG_MMC_WRITE=y
> > > > > +# CONFIG_MMC_BROKEN_CD is not set CONFIG_DM_MMC=y
> > > > > +CONFIG_SPL_DM_MMC=y CONFIG_MMC_SDHCI_ADMA_HELPERS=y #
> > > > > +CONFIG_ARM_PL180_MMCI is not set CONFIG_MMC_QUIRKS=y
> > > > > +CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
> > > > > +CONFIG_MMC_HW_PARTITIONING=y
> > > > > +# CONFIG_SUPPORT_EMMC_RPMB is not set #
> > > CONFIG_SUPPORT_EMMC_BOOT is
> > > > > +not set # CONFIG_MMC_IO_VOLTAGE is not set #
> > > > > +CONFIG_MMC_HS400_ES_SUPPORT is not set #
> > > CONFIG_MMC_HS400_SUPPORT
> > > > > +is not set # CONFIG_MMC_HS200_SUPPORT is not set
> > > > > +CONFIG_MMC_VERBOSE=n CONFIG_MMC_TRACE=n #
> CONFIG_MMC_DW
> > > is not set
> > > > > +# CONFIG_MMC_MXC is not set # CONFIG_MMC_PCI is not set #
> > > > > +CONFIG_MMC_OMAP_HS is not set CONFIG_MMC_SDHCI=y #
> > > > > +CONFIG_MMC_SDHCI_SDMA is not set CONFIG_MMC_SDHCI_ADMA=y
> > > > > +CONFIG_SPL_MMC_SDHCI_ADMA=y # CONFIG_MMC_SDHCI_BCMSTB
> is
> > > not set
> > > > > +CONFIG_MMC_SDHCI_CADENCE=y CONFIG_CMD_FAT=y
> > > CONFIG_DOS_PARTITION=y
> > > > > +CONFIG_SPL_DOS_PARTITION=y
> > > CONFIG_SPL_SYS_DISABLE_DCACHE_OPS=y
> > > > > +CONFIG_CMD_MTD=y
> > > > > +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
> > > > > +CONFIG_CMD_NAND_TRIMFFS=y
> CONFIG_CMD_NAND_LOCK_UNLOCK=y
> > > > > +CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y
> > > > > +CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SPI_FLASH_MTD=y
> > > > > +CONFIG_SPL_MTD_SUPPORT=y
> > > > > +CONFIG_MTDIDS_DEFAULT="nand0=10b80000.nand.0"
> > > > > +CONFIG_MTDPARTS_DEFAULT="mtdparts=10b80000.nand.0:2m(u-
> boot),-
> > > (root)"
> > > > > +CONFIG_CMD_UBI=y
> > > > > +CONFIG_CMD_UBIFS=y
> > > > > +CONFIG_MTD_UBI=y
> > > > > +CONFIG_MTD_UBI_WL_THRESHOLD=4096
> > > > > +CONFIG_MTD_UBI_BEB_LIMIT=20
> > > > > +# CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not
> > > > > +set CONFIG_OF_LIST=""
> > > > > +CONFIG_ENV_IS_IN_UBI=y
> > > > > +CONFIG_ENV_UBI_PART="root"
> > > > > +CONFIG_ENV_UBI_VOLUME="env"
> > > > > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> > > > > +CONFIG_NET_RANDOM_ETHADDR=y
> > > > > +CONFIG_SPL_DM_SEQ_ALIAS=y
> > > > > +CONFIG_SPL_ALTERA_SDRAM=y
> > > > > +CONFIG_FPGA_INTEL_PR=y
> > > > > +CONFIG_DWAPB_GPIO=y
> > > > > +CONFIG_DM_I2C=n
> > > > > +CONFIG_SYS_I2C_DW=n
> > > > > +CONFIG_MISC=y
> > > > > +CONFIG_MISC_INIT_R=y
> > > > > +CONFIG_MTD=y
> > > > > +CONFIG_DM_MTD=y
> > > > > +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
> > > > > +CONFIG_SYS_NAND_U_BOOT_OFFS=0x0
> > > > > +CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x100000
> > > > > +CONFIG_SF_DEFAULT_MODE=0x2003
> > > > > +CONFIG_SPI_FLASH_SPANSION=y
> > > > > +CONFIG_SPI_FLASH_STMICRO=y
> > > > > +CONFIG_UBI_SILENCE_MSG=y
> > > > > +CONFIG_PHY_MARVELL=y
> > > > > +CONFIG_DM_ETH=y
> > > > > +CONFIG_DWC_ETH_XGMAC=y
> > > > > +CONFIG_RGMII=y
> > > > > +CONFIG_DM_RESET=y
> > > > > +CONFIG_SYS_NS16550_MEM32=y
> > > > > +CONFIG_SPI=y
> > > > > +CONFIG_CADENCE_QSPI=y
> > > > > +CONFIG_DESIGNWARE_SPI=y
> > > > > +CONFIG_USB=y
> > > > > +CONFIG_USB_DWC2=n
> > > > > +CONFIG_USB_DWC3=y
> > > > > +CONFIG_USB_XHCI_HCD=y
> > > > > +CONFIG_USB_XHCI_DWC3=y
> > > > > +CONFIG_UBIFS_SILENCE_MSG=y
> > > > > +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_PANIC_HANG=y
> > > > > +CONFIG_SPL_SPI_LOAD=y
> > > > > +CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_WDT=n
> CONFIG_CMD_WDT=n
> > > > > +CONFIG_DESIGNWARE_WATCHDOG=n CONFIG_SPL_WDT=n
> > > > > +CONFIG_WATCHDOG_AUTOSTART=n CONFIG_TIMER=n
> > > > > +CONFIG_DESIGNWARE_APB_TIMER=n
> > > > > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> > > > > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80300000
> > > > > +CONFIG_SPL_MAX_SIZE=0x40000
> > > > > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> > > > > +CONFIG_SPL_BSS_START_ADDR=0xbff00000
> > > > > +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> > > > > +CONFIG_SPL_STACK=0x73000
> > > > > +CONFIG_SYS_SPL_MALLOC=y
> > > > > +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
> > > > > +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xbfa00000
> > > > > +CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
> > > > > +CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_EFI_LOADER is not
> set
> > > > > +CONFIG_I3C=n CONFIG_DW_I3C_MASTER=n CONFIG_CMD_I3C=n
> > > > > +CONFIG_MTD_RAW_NAND=y CONFIG_NAND_CADENCE=y
> > > > > +CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_FRAMEWORK=y
> > > > > +CONFIG_SPL_NAND_CADENCE=y
> > > > > +CONFIG_SYS_MAXARGS=32
> > > > > +CONFIG_SYS_NAND_ONFI_DETECTION=y
> > > > > --
> > > > > 2.26.2
> > > > >
> > > >
> > > > Please add Manteiner support for this board
> > >
> > > Also you should strongly consider using the #include mechanism (see
> > > configs/am62x_lpsk_a53_defconfig and configs/am62x_evm_a53_defconfig
> > > for example and note the CONFIG_ARM and similar lines are required
> > > for buildman to work still and so CI) to make long term support for
> > > this variant of the board easier.
> > >
> > > --
> > > Tom
> >
> > Hi Tom &  Michael,
> >
> > Thanks for the reference.
> > Please expect the next version of this patch, which I will include the
> > maintainer and #include mechanism.
> 
> One important point, try to run the CI in github because this allow me to review
> quick and appply the patches that are ok with it
> 
> Michael
> 
> >
> > Regards
> > Dinesh
> 
> 
> 
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> michael at amarulasolutions.com
> __________________________________
> 
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172
> info at amarulasolutions.com www.amarulasolutions.com

Sure, will run the CI in github.

Regards
Dinesh