[PATCH] mtd: spi-nor: Clear Winbond SR3 WPS bit on boot

Tom Rini trini at konsulko.com
Thu Oct 10 20:25:21 CEST 2024


On Mon, Mar 04, 2024 at 05:16:05PM +0100, Marek Vasut wrote:

> Some Winbond SPI NORs have special SR3 register which is
> used among other things to control whether non-standard
> "Individual Block/Sector Write Protection" (WPS bit)
> locking scheme is activated. This non-standard locking
> scheme is not supported by either U-Boot or Linux SPI
> NOR stack so make sure it is disabled, otherwise the
> SPI NOR may appear locked for no obvious reason.
> 
> This SR3 WPS appears e.g. on W25Q16FW which has the same ID as
> W25Q16DW, but the W25Q16DW does not implement the SR3 WPS bit.
> 
> Signed-off-by: Marek Vasut <marex at denx.de>

Applied to u-boot/master, thanks!

-- 
Tom
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