[PATCH v2 0/2] Add TI K3 PCIe Controller support for J7200

[Siddharth Vadapalli]

Hello,

This series adds support for the Cadence PCIe controller on TI's K3
family of SoCs to which the J7200 SoC belongs. The driver is an adaptation
of the Linux driver (drivers/pci/controller/cadence/pci-j721e.c) and has
been implemented specifically for Root-Complex mode of operation on the
J7200 SoC. A minor set of changes will be sufficient to support other K3
SoCs as well with plans to implement it in the near future.

Series is based on commit
a404065479 power: pmic: pca9450: Add missing newline
of the master branch of U-Boot.

v1 of this series was posted as an RFC at:
https://patchwork.ozlabs.org/project/uboot/cover/20240821145908.3408573-1-s-vadapalli@ti.com/
Changes since v1:
- Addressed Tom's feedback at:
  https://patchwork.ozlabs.org/project/uboot/patch/20240821145908.3408573-2-s-vadapalli@ti.com/#3365925
  by removing extra headers and replacing usleep_range() with udelay().
- Added inbound translation configuration thereby enabling support for
  NVMe devices.
- Added SoC specific quirks and the corresponding code to handle them.
- Updated j7200_evm_a72_defconfig to enable NVMe configs since NVMe is
  now supported with this series.

The logs corresponding to validating PCI Root-Complex functionality with
an NVMe SSD connected to the PCIe Connector on J7200-EVM are at:
https://gist.github.com/Siddharth-Vadapalli-at-TI/18a64e0c258f74274d80c5871594f0dc

Regards,
Siddharth.

Siddharth Vadapalli (2):
  pci: Add TI K3 Cadence PCIe Controller
  configs: j7200_evm_a72_defconfig: Enable configs for PCI support

 configs/j7200_evm_a72_defconfig |   5 +
 drivers/pci/Kconfig             |   6 +
 drivers/pci/Makefile            |   1 +
 drivers/pci/pcie_cdns_ti.c      | 851 ++++++++++++++++++++++++++++++++
 4 files changed, 863 insertions(+)
 create mode 100644 drivers/pci/pcie_cdns_ti.c

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2.40.1