imx8qxp: deneb board fails with current HEAD

[Heiko Schocher]

Hello Peng,

I just rebased my current work on siemens deneb board with current
master:

* d5cab0d6ad - (HEAD -> master, origin/master, origin/WIP/15Oct2024, origin/HEAD) Revert "Makefile: 
Drop SPL_FIT_GENERATOR / SPL_FIT_SOURCE support" changes (vor 3 Stunden) <Tom Rini>

And see:
"""
U-Boot SPL 2024.10-01044-g91b1263d96d9 (Oct 16 2024 - 07:10:25 +0200)
Normal Boot
Trying to boot from MMC1
__imx8_clk_enable(Invalid clk ID #0)
fsl_esdhc usdhc at 5b010000: Failed to enable clks: -22
__imx8_clk_enable(Invalid clk ID #0)
fsl_esdhc usdhc at 5b010000: Failed to enable clks: -22
spl: could not initialize mmc. error: -22
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
"""

Looking around the changes I found your commit:


commit 76332fae769acbba49751827ce126b0cb1014b48
Author: Peng Fan <peng.fan at nxp.com>
Date:   Tue Oct 1 21:07:53 2024 +0800

     mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API

     With partition reset supported for i.MX8QM/QXP/95 and etc, when linux
     mmc runtime suspended, the mmc clks are gated off. While at same time
     system controller reset Cortex-A cores because of various reasons(
     WDOG timeout and etc), with SPL run again, only enable PER clk is not
     enough, also need to enable AHB/IPG clk, here use clk bulk API to enable
     all the clocks.

     Signed-off-by: Peng Fan <peng.fan at nxp.com>


reverting it, and board boots fine again!

May you have an idea? I try to look deeper soon.

(A fast look as I wondered about clk id 0):

./include/dt-bindings/clock/imx8qxp-clock.h
#define IMX8QXP_CLK_DUMMY                                       0

and ./arch/arm/dts/fsl-imx8dx.dtsi
512         usdhc2: usdhc at 5b020000 {
513                 compatible = "fsl,imx8qm-usdhc", "fsl,imx6sl-usdhc";
[...]
517                 clocks = <&clk IMX8QXP_SDHC1_IPG_CLK>,
518                         <&clk IMX8QXP_SDHC1_CLK>,
519                         <&clk IMX8QXP_CLK_DUMMY>;
520                 clock-names = "ipg", "per", "ahb";

So this explains ID 0 ... and with drivers/clk/imx/clk-imx8qxp.c
242 int __imx8_clk_enable(struct clk *clk, bool enable)
243 {
[...]
250         switch (clk->id) {
251         case IMX8QXP_I2C0_CLK:

no entry for IMX8QXP_CLK_DUMMY ...

So I wonder how this can work ...

Thanks!

bye,
Heiko
[1]
U-Boot SPL 2024.10-01045-g0a08358303ba (Oct 16 2024 - 07:18:23 +0200)
Normal Boot
Trying to boot from MMC1
Primary set selected
Load image from MMC/SD 0x47800


U-Boot 2024.10-01045-g0a08358303ba (Oct 16 2024 - 07:18:23 +0200) ##v01.06

CPU:   NXP i.MX8QXP RevC A35 at 1200 MHz at 31C
Model: Siemens CXG3
Board: Capricorn
Build: SCFW 042ba867, SECO-FW c9de51c0, ATF 2ba2c83
Boot:  MMC0
Reset cause: POR
DRAM:  2 GiB
HW Version: v04.03
Core:  94 devices, 23 uclasses, devicetree: separate
WDT:   Started scu-wdt without servicing  (60s timeout)
MMC:   FSL_SDHC: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment

Reading from MMC(0)... In:    serial at 5a080000
Out:   serial at 5a080000
Err:   serial at 5a080000
ERROR: PCA9552 probe failed
I2C LED init failed
Net:   eth1: ethernet at 5b050000 [PRIME]
Autobooting in 3 seconds, press "<Esc><Esc>" to stop
U-Boot#
U-Boot#

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