imx8qxp: deneb board fails with current HEAD
Heiko Schocher
hs at denx.de
Wed Oct 16 08:24:07 CEST 2024
Hello Peng,
On 16.10.24 08:11, Peng Fan wrote:
> Hi Heiko,
>
>> Subject: imx8qxp: deneb board fails with current HEAD
>>
>> Hello Peng,
>>
>> I just rebased my current work on siemens deneb board with current
>> master:
>>
>> * d5cab0d6ad - (HEAD -> master, origin/master, origin/WIP/15Oct2024,
>> origin/HEAD) Revert "Makefile:
>> Drop SPL_FIT_GENERATOR / SPL_FIT_SOURCE support" changes (vor 3
>> Stunden) <Tom Rini>
>
>
> My bad. I had a patch in my local, this should resolve the issue you met.
No problem!
> From 3e5f8ad6cb93b9538852230d01c01b52d5c1c9d1 Mon Sep 17 00:00:00 2001
> From: Peng Fan <peng.fan at nxp.com>
> Date: Fri, 11 Oct 2024 19:57:49 +0800
> Subject: [PATCH] clk: imx8: Add dummy clk
>
> There is a dummy clk entry for i.MX8QM/QXP, so add the dummy clk enable
> and get rate. Otherwise "__imx8_clk_enable(Invalid clk ID #0)".
>
> Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
> Signed-off-by: Peng Fan <peng.fan at nxp.com>
> ---
> drivers/clk/imx/clk-imx8qm.c | 4 ++++
> drivers/clk/imx/clk-imx8qxp.c | 4 ++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c
> index 62fed7e3e32..466d71786cf 100644
> --- a/drivers/clk/imx/clk-imx8qm.c
> +++ b/drivers/clk/imx/clk-imx8qm.c
> @@ -48,6 +48,8 @@ ulong imx8_clk_get_rate(struct clk *clk)
> debug("%s(#%lu)\n", __func__, clk->id);
>
> switch (clk->id) {
> + case IMX8QM_CLK_DUMMY:
> + return 0;
> case IMX8QM_A53_DIV:
> resource = SC_R_A53;
> pm_clk = SC_PM_CLK_CPU;
> @@ -264,6 +266,8 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
> debug("%s(#%lu)\n", __func__, clk->id);
>
> switch (clk->id) {
> + case IMX8QM_CLK_DUMMY:
> + return 0;
> case IMX8QM_I2C0_IPG_CLK:
> case IMX8QM_I2C0_CLK:
> case IMX8QM_I2C0_DIV:
> diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
> index 18bdc08971b..79098623bc8 100644
> --- a/drivers/clk/imx/clk-imx8qxp.c
> +++ b/drivers/clk/imx/clk-imx8qxp.c
> @@ -51,6 +51,8 @@ ulong imx8_clk_get_rate(struct clk *clk)
> debug("%s(#%lu)\n", __func__, clk->id);
>
> switch (clk->id) {
> + case IMX8QXP_CLK_DUMMY:
> + return 0;
> case IMX8QXP_A35_DIV:
> resource = SC_R_A35;
> pm_clk = SC_PM_CLK_CPU;
> @@ -248,6 +250,8 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
> debug("%s(#%lu)\n", __func__, clk->id);
>
> switch (clk->id) {
> + case IMX8QXP_CLK_DUMMY:
> + return 0;
> case IMX8QXP_I2C0_CLK:
> case IMX8QXP_I2C0_IPG_CLK:
> resource = SC_R_I2C_0;
>
Heh, yes, that what I thought after I had sended my EMail... but
wondering why we use a dummy here and not like it is in linux:
clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
<&sdhc0_lpcg IMX_LPCG_CLK_5>,
<&sdhc0_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "ahb", "per";
?
Do you plan to send this patch?
bye,
Heiko
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