[PATCH 2/4] ARM: stm32mp: enable data cache after LMB configuration for STM32MP1

Patrick DELAUNAY patrick.delaunay at foss.st.com
Wed Oct 16 20:30:01 CEST 2024


Hi,

On 10/11/24 17:31, Patrick Delaunay wrote:
> Move the stm32mp1 data cache reconfiguration after the lmb init call
> board_r::initr_lmb to allow parsing of the reserved region with
> no-map tag.
>
> After this patch the DDR is not fully mapped up to arch_early_init_r()
> call, only the relocation region is mapped, but it is enough for
> the first board_r initialization phases; later, when arch_early_init_r()
> is called, the LMB is already initialized and the function
> lmb_is_reserved_flags() function is functional, this LMB function
> is called in the weak function dram_bank_mmu_setup() when
> dcache_enable() is executed.
>
> Without this change, as LMB is not initialized when it is used in
> dram_bank_mmu_setup, the OP-TEE region is mapped cache-able by U-Boot
> and we have some firewall violation since "LMB memory map global and
> persistent" series.
>
> Fixes: ed17a33fed29 ("lmb: make LMB memory map persistent and global")
> Signed-off-by: Patrick Delaunay <patrick.delaunay at foss.st.com>
> ---
>
>   arch/arm/mach-stm32mp/Kconfig        | 2 ++
>   arch/arm/mach-stm32mp/stm32mp1/cpu.c | 7 +++++++
>   2 files changed, 9 insertions(+)
>

Applied to u-boot-stm/master, thanks!

Regards
Patrick



More information about the U-Boot mailing list