[PATCH 1/6] Revert "spi: zynq_qspi: Add parallel memories support in QSPI driver"

[Marek Vasut]

On 10/23/24 4:14 PM, Abbarapu, Venkatesh wrote:
> Hi,
> 
>> -----Original Message-----
>> From: Marek Vasut <marek.vasut at mailbox.org>
>> Sent: Wednesday, October 23, 2024 6:15 PM
>> To: Abbarapu, Venkatesh <venkatesh.abbarapu at amd.com>; u-boot at lists.denx.de
>> Cc: Andre Przywara <andre.przywara at arm.com>; Ashok Reddy Soma
>> <ashok.reddy.soma at amd.com>; Jagan Teki <jagan at amarulasolutions.com>;
>> Michael Walle <mwalle at kernel.org>; Simek, Michal <michal.simek at amd.com>;
>> Patrice Chotard <patrice.chotard at foss.st.com>; Patrick Delaunay
>> <patrick.delaunay at foss.st.com>; Pratyush Yadav <p.yadav at ti.com>; Quentin
>> Schulz <quentin.schulz at cherry.de>; Sean Anderson <seanga2 at gmail.com>;
>> Simon Glass <sjg at chromium.org>; Takahiro Kuwano
>> <Takahiro.Kuwano at infineon.com>; Tom Rini <trini at konsulko.com>; Tudor
>> Ambarus <tudor.ambarus at linaro.org>; uboot-stm32 at st-md-
>> mailman.stormreply.com
>> Subject: Re: [PATCH 1/6] Revert "spi: zynq_qspi: Add parallel memories support in
>> QSPI driver"
>>
>> On 10/23/24 11:07 AM, Abbarapu, Venkatesh wrote:
>>> Hi,
>>> Tested with the non-stacked default single configuration on ZynqMP zcu102 board
>> and didn’t see any issue.
>>>
>>> ZynqMP> sf probe 0 0 0
>>> SF: Detected mt25qu512a with page size 256 Bytes, erase size 64 KiB,
>>> total 64 MiB
>>> ZynqMP> sf erase 0x0 0x4000000;mw.b 0x8000 aabbccdd 0x4000000;sf write
>>> ZynqMP> 0x8000 0x0 0x4000000;mw.b 0x8008000 0x0 0x4000000;sf read
>>> ZynqMP> 0x8008000 0x0 0x4000000;cmp.b 0x8000 0x8008000 0x4000000
>>> SF: 67108864 bytes @ 0x0 Erased: OK
>>> device 0 whole chip
>>> SF: 67108864 bytes @ 0x0 Written: OK
>>> device 0 whole chip
>>> SF: 67108864 bytes @ 0x0 Read: OK
>>> Total of 67108864 byte(s) were the same
>>>
>>> Thanks
>>> Venkatesh
>>>
>>>> -----Original Message-----
>>>> From: Marek Vasut <marek.vasut at mailbox.org>
>>>> Sent: Wednesday, October 23, 2024 2:12 PM
>>>> To: Abbarapu, Venkatesh <venkatesh.abbarapu at amd.com>; Marek Vasut
>>>> <marek.vasut+renesas at mailbox.org>; u-boot at lists.denx.de
>>>> Cc: Andre Przywara <andre.przywara at arm.com>; Ashok Reddy Soma
>>>> <ashok.reddy.soma at amd.com>; Jagan Teki <jagan at amarulasolutions.com>;
>>>> Michael Walle <mwalle at kernel.org>; Simek, Michal
>>>> <michal.simek at amd.com>; Patrice Chotard
>>>> <patrice.chotard at foss.st.com>; Patrick Delaunay
>>>> <patrick.delaunay at foss.st.com>; Pratyush Yadav <p.yadav at ti.com>;
>>>> Quentin Schulz <quentin.schulz at cherry.de>; Sean Anderson
>>>> <seanga2 at gmail.com>; Simon Glass <sjg at chromium.org>; Takahiro Kuwano
>>>> <Takahiro.Kuwano at infineon.com>; Tom Rini <trini at konsulko.com>; Tudor
>>>> Ambarus <tudor.ambarus at linaro.org>; uboot-stm32 at st-md-
>>>> mailman.stormreply.com
>>>> Subject: Re: [PATCH 1/6] Revert "spi: zynq_qspi: Add parallel
>>>> memories support in QSPI driver"
>>>>
>>>> On 10/23/24 5:18 AM, Abbarapu, Venkatesh wrote:
>>>>> Hi Marek,
>>>>> There was some issue and fix is sent
>>>>> https://lore.kernel.org/u-boot/20241018082644.22495-1-venkatesh.abba
>>>>> ra
>>>>> pu at amd.com/T/#u
>>>>
>>>> Is this one fix or three fixes for three different issues ?
>>>>
>>>> This seems to fix READ errors, which is apparently another error
>>>> introduced by this stuff. In my case, plain and simply 'sf probe ; sf
>>>> update' combination with single non- stacked SPI NOR does not work. Was such
>> a simple configuration ever tested ?
>>>>
>>>>> Not sure we need to revert whole parallel/stacked support?
>>>> Please stop top-posting.
>>
>> You ran completely different test on completely different chip.
>>
>> Stop top posting.
> 
> Sorry for top posting
> 
> Will try to get the spansion flash part and try the below tests.
> At this point tried testing on different board with different flash part.
> 
> Zynq> sf probe 0 0 0
> SF: Detected mx66l1g45g with page size 256 Bytes, erase size 64 KiB, total 128 MiB
> Zynq> sf update 0x4000000 0 0x160000
> device 0 offset 0x0, size 0x160000
> 1441792 bytes written, 0 bytes skipped in 5.735s, speed 257435 B/s
> 
> Zynq> sf erase 0x0 0x4000000;mw.b 0x8000 aabbccdd 0x4000000;sf write 0x8000 0x0 0x4000000;mw.b 0x8008000 0x0 0x4000000;sf read 0x8008000 0x0 0x4000000;cmp.b 0x8000 0x8008000 0x4000000
> SF: 67108864 bytes @ 0x0 Erased: OK
> device 0 offset 0x0, size 0x4000000
> SF: 67108864 bytes @ 0x0 Written: OK
> device 0 offset 0x0, size 0x4000000
> SF: 67108864 bytes @ 0x0 Read: OK
> Total of 67108864 byte(s) were the same
Commit message reads:

"
this no longer works:

=> sf probe && sf update 0x50000000 0 0x160000
SF: Detected s25fs512s with page size 256 Bytes, erase size 256 KiB, 
total 64 MiB
device 0 offset 0x0, size 0x160000
SPI flash failed in read step
"

You ran completely different test on completely different chip.

The test is "sf probe && sf update 0x50000000 0 0x160000" , did you ever 
test "sf update" ?