[PATCH 8/8] rockchip: rk3588-nanopc-t6: Add support for NanoPC-T6 LTS

[Kever Yang]

On 2024/10/18 04:00, Jonas Karlman wrote:
> Update defconfig to enable features included in pending upstream DT and
> implement board_fit_config_name_match() to load correct DT for LTS and
> non-LTS version of the NanoPC-T6.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi     |  5 ++
>   board/friendlyelec/nanopc-t6-rk3588/Makefile  |  3 +
>   .../nanopc-t6-rk3588/nanopc-t6-rk3588.c       | 59 +++++++++++++++++++
>   configs/nanopc-t6-rk3588_defconfig            | 12 ++++
>   4 files changed, 79 insertions(+)
>   create mode 100644 board/friendlyelec/nanopc-t6-rk3588/Makefile
>   create mode 100644 board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
>
> diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> index 3261b2c42b4b..8465dcd4c9cd 100644
> --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> @@ -11,6 +11,11 @@
>   	bootph-some-ram;
>   };
>   
> +&saradc {
> +	bootph-pre-ram;
> +	vdd-microvolts = <1800000>;
> +};
> +
>   &sfc {
>   	flash at 0 {
>   		bootph-pre-ram;
> diff --git a/board/friendlyelec/nanopc-t6-rk3588/Makefile b/board/friendlyelec/nanopc-t6-rk3588/Makefile
> new file mode 100644
> index 000000000000..2858e0d7c26f
> --- /dev/null
> +++ b/board/friendlyelec/nanopc-t6-rk3588/Makefile
> @@ -0,0 +1,3 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +
> +obj-y += nanopc-t6-rk3588.o
> diff --git a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
> new file mode 100644
> index 000000000000..05cf55e4291d
> --- /dev/null
> +++ b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
> @@ -0,0 +1,59 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +#include <adc.h>
> +#include <env.h>
> +#include <linux/errno.h>
> +#include <linux/kernel.h>
> +
> +#define HW_ID_CHANNEL	5
> +
> +struct board_model {
> +	unsigned int low;
> +	unsigned int high;
> +	const char *fdtfile;
> +};
> +
> +static const struct board_model board_models[] = {
> +	{  348,  528, "rockchip/rk3588-nanopc-t6.dtb" },
> +	{ 1957, 2137, "rockchip/rk3588-nanopc-t6-lts.dtb" },
> +};
> +
> +static const struct board_model *get_board_model(void)
> +{
> +	unsigned int val;
> +	int i, ret;
> +
> +	ret = adc_channel_single_shot("adc at fec10000", HW_ID_CHANNEL, &val);
> +	if (ret)
> +		return NULL;
> +
> +	for (i = 0; i < ARRAY_SIZE(board_models); i++) {
> +		unsigned int min = board_models[i].low;
> +		unsigned int max = board_models[i].high;
> +
> +		if (min <= val && val <= max)
> +			return &board_models[i];
> +	}
> +
> +	return NULL;
> +}
> +
> +int rk_board_late_init(void)
> +{
> +	const struct board_model *model = get_board_model();
> +
> +	if (model)
> +		env_set("fdtfile", model->fdtfile);
> +
> +	return 0;
> +}
> +
> +int board_fit_config_name_match(const char *name)
> +{
> +	const struct board_model *model = get_board_model();
> +
> +	if (model && !strcmp(name, model->fdtfile))
> +		return 0;
> +
> +	return -EINVAL;
> +}
> diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig
> index d62c8168a8d6..772b7df15557 100644
> --- a/configs/nanopc-t6-rk3588_defconfig
> +++ b/configs/nanopc-t6-rk3588_defconfig
> @@ -32,6 +32,7 @@ CONFIG_SPL_PAD_TO=0x7f8000
>   CONFIG_SPL_SPI_LOAD=y
>   CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>   CONFIG_SPL_ATF=y
> +CONFIG_CMD_ADC=y
>   CONFIG_CMD_GPIO=y
>   CONFIG_CMD_GPT=y
>   CONFIG_CMD_I2C=y
> @@ -43,13 +44,20 @@ CONFIG_CMD_REGULATOR=y
>   # CONFIG_SPL_DOS_PARTITION is not set
>   CONFIG_SPL_OF_CONTROL=y
>   CONFIG_OF_LIVE=y
> +CONFIG_OF_LIST="rockchip/rk3588-nanopc-t6 rockchip/rk3588-nanopc-t6-lts"
>   CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>   CONFIG_SPL_DM_SEQ_ALIAS=y
>   CONFIG_SPL_REGMAP=y
>   CONFIG_SPL_SYSCON=y
> +CONFIG_SPL_ADC=y
> +CONFIG_BUTTON=y
> +CONFIG_BUTTON_ADC=y
>   CONFIG_SPL_CLK=y
>   CONFIG_ROCKCHIP_GPIO=y
>   CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_LED=y
> +CONFIG_LED_GPIO=y
>   CONFIG_MISC=y
>   CONFIG_SUPPORT_EMMC_RPMB=y
>   CONFIG_MMC_DW=y
> @@ -69,12 +77,16 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>   CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
>   CONFIG_PHY_ROCKCHIP_USBDP=y
>   CONFIG_SPL_PINCTRL=y
> +CONFIG_DM_PMIC=y
> +CONFIG_PMIC_RK8XX=y
> +CONFIG_REGULATOR_RK8XX=y
>   CONFIG_PWM_ROCKCHIP=y
>   CONFIG_SPL_RAM=y
>   CONFIG_BAUDRATE=1500000
>   CONFIG_DEBUG_UART_SHIFT=2
>   CONFIG_SYS_NS16550_MEM32=y
>   CONFIG_ROCKCHIP_SFC=y
> +CONFIG_ROCKCHIP_SPI=y
>   CONFIG_SYSRESET=y
>   CONFIG_USB=y
>   CONFIG_USB_XHCI_HCD=y