[PATCH] mtd: spi-nor-ids: Add NO_CHIP_ERASE flag to Infineon 2Gb parts

[Tudor Ambarus]

On 30.08.2024 03:05, tkuw584924 at gmail.com wrote:
> From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
> 
> S25HS02GT, S25HL02GT, and S28HS02GT are dual-die package parts and do
> not support chip erase.
> 
Please split the patch and add fixes tag so that the fixes can be
applied/tracked easily. I already checked when those flashes were introduced

> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
> ---
>  drivers/mtd/spi/spi-nor-ids.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index 88709a52b3..457965dad1 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -369,7 +369,7 @@ const struct flash_info spi_nor_ids[] = {
>  		SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
>  		USE_CLSR) },
>  	{ INFO6("s25hl02gt",  0x342a1c, 0x0f0090, 256 * 1024, 1024,
> -		SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> +		SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | NO_CHIP_ERASE) },
>  	{ INFO6("s25hs512t",  0x342b1a, 0x0f0390, 256 * 1024, 256,
>  		SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
>  		USE_CLSR) },
> @@ -377,7 +377,7 @@ const struct flash_info spi_nor_ids[] = {
>  		SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
>  		USE_CLSR) },
>  	{ INFO6("s25hs02gt",  0x342b1c, 0x0f0090, 256 * 1024, 1024,
> -		SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> +		SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | NO_CHIP_ERASE) },

one patch for these two changes please with the following fixes tag:
Fixes: c95a914aed7 ("mtd: spi-nor-ids: Add Cypress s25hl-t/s25hs-t")

>  	{ INFO6("s25fs256t",  0x342b19, 0x0f0890, 128 * 1024, 256,
>  		SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>  #ifdef CONFIG_SPI_FLASH_S28HX_T
> @@ -385,7 +385,7 @@ const struct flash_info spi_nor_ids[] = {
>  	{ INFO("s28hl01gt",  0x345a1b,      0, 256 * 1024, 512, SPI_NOR_OCTAL_DTR_READ) },
>  	{ INFO("s28hs512t",  0x345b1a,      0, 256 * 1024, 256, SPI_NOR_OCTAL_DTR_READ) },
>  	{ INFO("s28hs01gt",  0x345b1b,      0, 256 * 1024, 512, SPI_NOR_OCTAL_DTR_READ) },
> -	{ INFO("s28hs02gt",  0x345b1c,      0, 256 * 1024, 1024, SPI_NOR_OCTAL_DTR_READ) },
> +	{ INFO("s28hs02gt",  0x345b1c,      0, 256 * 1024, 1024, SPI_NOR_OCTAL_DTR_READ | NO_CHIP_ERASE) },

and another patch for this change:
Fixes: 16dd1095101 ("mtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID")

With that feel free to my R-b tag on both:
Reviewed-by: Tudor Ambarus <tudor.ambarus at linaro.org>
>  #endif
>  #endif
>  #ifdef CONFIG_SPI_FLASH_SST		/* SST */