[PATCH] sh: cache: Fill in invalidate_icache_all()
Marek Vasut
marek.vasut at mailbox.org
Tue Sep 10 19:54:56 CEST 2024
On 9/10/24 7:21 PM, Tom Rini wrote:
> On Tue, Sep 10, 2024 at 02:15:58AM +0200, Marek Vasut wrote:
>
>> Implement invalidate_icache_all() by clearing all V bits in
>> IC and OC. This is done by setting CCR cache control register
>> ICI and OCI bits.
>>
>> Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
>> ---
>> Cc: Ilias Apalodimas <ilias.apalodimas at linaro.org>
>> Cc: Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
>> Cc: Tom Rini <trini at konsulko.com>
>> Cc: u-boot at lists.denx.de
>> ---
>> arch/sh/cpu/sh4/cache.c | 11 +++++++----
>> 1 file changed, 7 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
>> index d3c480e79ed..99acc599965 100644
>> --- a/arch/sh/cpu/sh4/cache.c
>> +++ b/arch/sh/cpu/sh4/cache.c
>> @@ -33,8 +33,9 @@ static inline void cache_wback_all(void)
>> }
>> }
>>
>> -#define CACHE_ENABLE 0
>> -#define CACHE_DISABLE 1
>> +#define CACHE_ENABLE 0
>> +#define CACHE_DISABLE 1
>> +#define CACHE_INVALIDATE 2
>>
>> static int cache_control(unsigned int cmd)
>> {
>> @@ -46,7 +47,9 @@ static int cache_control(unsigned int cmd)
>> if (ccr & CCR_CACHE_ENABLE)
>> cache_wback_all();
>>
>> - if (cmd == CACHE_DISABLE)
>> + if (cmd == CACHE_INVALIDATE)
>> + outl(CCR_CACHE_ICI | ccr, CCR);
>> + else if (cmd == CACHE_DISABLE)
>> outl(CCR_CACHE_STOP, CCR);
>> else
>> outl(CCR_CACHE_INIT, CCR);
>> @@ -103,7 +106,7 @@ void icache_disable(void)
>>
>> void invalidate_icache_all(void)
>> {
>> - puts("No arch specific invalidate_icache_all available!\n");
>> + cache_control(CACHE_INVALIDATE);
>> }
>>
>> int icache_status(void)
>
> Thanks for filling this in, I wasn't sure how the implementation would
> look from a quick skim of the linux kernel code.
I believe it should look like the above, but lemme CC Geert to be on the
safe side.
More information about the U-Boot
mailing list