[PATCH v2 16/18] mmc: rockchip: Allow clocks to be missing
Simon Glass
sjg at chromium.org
Fri Sep 20 09:24:40 CEST 2024
Allow MMC init when clock support is not enabled in a particular phase.
Refactor the setting of priv->emmc_clk so it is a bit clearer.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
(no changes since v1)
drivers/mmc/rockchip_dw_mmc.c | 6 ++----
drivers/mmc/rockchip_sdhci.c | 9 ++++-----
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 7e341665aa3..5ba99d68b7d 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -131,13 +131,11 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
priv->minmax[1] = dtplat->max_frequency;
ret = clk_get_by_phandle(dev, &dtplat->clocks[1], &priv->clk);
- if (ret < 0)
- return ret;
#else
ret = clk_get_by_index(dev, 1, &priv->clk);
- if (ret < 0)
- return ret;
#endif
+ if (ret < 0 && ret != -ENOSYS)
+ return log_msg_ret("clk", ret);
host->fifo_depth = priv->fifo_depth;
host->fifo_mode = priv->fifo_mode;
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 35667b86b50..15b4a39770a 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -571,20 +571,19 @@ static int rockchip_sdhci_probe(struct udevice *dev)
struct rockchip_sdhc *priv = dev_get_priv(dev);
struct mmc_config *cfg = &plat->cfg;
struct sdhci_host *host = &priv->host;
- struct clk clk;
+ struct clk *clk = &priv->emmc_clk;
int ret;
host->max_clk = cfg->f_max;
- ret = clk_get_by_index(dev, 0, &clk);
+ ret = clk_get_by_index(dev, 0, clk);
if (!ret) {
- ret = clk_set_rate(&clk, host->max_clk);
+ ret = clk_set_rate(clk, host->max_clk);
if (IS_ERR_VALUE(ret))
printf("%s clk set rate fail!\n", __func__);
- } else {
+ } else if (ret != -ENOSYS) {
printf("%s fail to get clk\n", __func__);
}
- priv->emmc_clk = clk;
priv->dev = dev;
if (data->get_phy) {
--
2.43.0
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