[PATCH] net: gem: Remove undocumented is-internal-pcspma dt flag
Michal Simek
michal.simek at amd.com
Fri Sep 20 15:27:52 CEST 2024
On 9/13/24 09:37, Michal Simek wrote:
> Generic understanding/consideration is that phy-mode as sgmi means that the
> internal PCS(Physical Coding Sublayer) should be enabled by default.
> Xilinx GEM implementation allows configuration GEM (gmii mode) + PL PCS PMA
> (sgmii mode, Physical Medum Attachment) but in this case phy-mode should be
> setup as gmii.
> The reason for this assumption is that phy-mode should be described based
> on GEM configuration not based on mode coming out of PHY.
>
> Also Linux kernel automatically setting up PCSSEL bit when phy mode is
> sgmii without a need to specified additional DT propety.
> All our DTSes with sgmii phy mode have this flag enabled that's why there
> is no need/reason to just duplicate information.
>
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
>
> arch/arm/dts/zynqmp-dlc21-revA.dts | 1 -
> arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 1 -
> arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 1 -
> arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 1 -
> arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 1 -
> arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 1 -
> arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts | 1 -
> arch/arm/dts/zynqmp-vpk120-revA.dts | 1 -
> drivers/net/zynq_gem.c | 9 ++-------
> 9 files changed, 2 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts
> index 59cf22d0eb98..293d8e97b63a 100644
> --- a/arch/arm/dts/zynqmp-dlc21-revA.dts
> +++ b/arch/arm/dts/zynqmp-dlc21-revA.dts
> @@ -87,7 +87,6 @@
> status = "okay";
> phy-handle = <&phy0>;
> phy-mode = "sgmii"; /* DTG generates this properly 1512 */
> - is-internal-pcspma;
> mdio: mdio {
> #address-cells = <1>;
> #size-cells = <0>;
> diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
> index 0b97fa3f28ac..4e0587fd441a 100644
> --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
> +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
> @@ -155,7 +155,6 @@
> phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>;
> phy-handle = <&phy0>;
> phy-mode = "sgmii";
> - is-internal-pcspma;
> mdio: mdio {
> #address-cells = <1>;
> #size-cells = <0>;
> diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
> index e3228fc98f0c..c439f778ca46 100644
> --- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
> +++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
> @@ -80,7 +80,6 @@
> status = "okay";
> phy-handle = <&phy0>;
> phy-mode = "sgmii";
> - is-internal-pcspma;
> mdio: mdio {
> #address-cells = <1>;
> #size-cells = <0>;
> diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
> index d3070b0062e9..ae52e8e996a5 100644
> --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
> +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
> @@ -90,7 +90,6 @@
> status = "okay";
> phy-handle = <&phy0>;
> phy-mode = "sgmii"; /* DTG generates this properly 1512 */
> - is-internal-pcspma;
> mdio: mdio {
> #address-cells = <1>;
> #size-cells = <0>;
> diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
> index ce7c5eb6d346..6349a0e10877 100644
> --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
> @@ -195,7 +195,6 @@
> phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>;
> phy-handle = <&phy0>;
> phy-mode = "sgmii";
> - is-internal-pcspma;
> assigned-clock-rates = <250000000>;
> };
>
> diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
> index 0a0cbd2b69ae..b0d737d3caf0 100644
> --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
> +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
> @@ -216,7 +216,6 @@
> phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>;
> phy-handle = <&phy0>;
> phy-mode = "sgmii";
> - is-internal-pcspma;
> assigned-clock-rates = <250000000>;
> };
>
> diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
> index b626d1aacf58..7849f8c540bf 100644
> --- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
> +++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
> @@ -117,7 +117,6 @@
> status = "okay";
> phy-handle = <&phy0>;
> phy-mode = "sgmii"; /* DTG generates this properly 1512 */
> - is-internal-pcspma;
> /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */
> mdio: mdio {
> #address-cells = <1>;
> diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts b/arch/arm/dts/zynqmp-vpk120-revA.dts
> index e0632883e4ec..4768fac71d02 100644
> --- a/arch/arm/dts/zynqmp-vpk120-revA.dts
> +++ b/arch/arm/dts/zynqmp-vpk120-revA.dts
> @@ -118,7 +118,6 @@
> status = "okay";
> phy-handle = <&phy0>;
> phy-mode = "sgmii"; /* DTG generates this properly 1512 */
> - is-internal-pcspma;
> /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */
> mdio: mdio {
> #address-cells = <1>;
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index fe7d10844507..461805ae53ff 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -228,7 +228,6 @@ struct zynq_gem_priv {
> struct clk tx_clk;
> struct clk pclk;
> u32 max_speed;
> - bool int_pcs;
> bool dma_64bit;
> u32 clk_en_info;
> struct reset_ctl_bulk resets;
> @@ -504,8 +503,7 @@ static int zynq_gem_init(struct udevice *dev)
> * Set SGMII enable PCS selection only if internal PCS/PMA
> * core is used and interface is SGMII.
> */
> - if (priv->interface == PHY_INTERFACE_MODE_SGMII &&
> - priv->int_pcs) {
> + if (priv->interface == PHY_INTERFACE_MODE_SGMII) {
> nwconfig |= ZYNQ_GEM_NWCFG_SGMII_ENBL |
> ZYNQ_GEM_NWCFG_PCS_SEL;
> }
> @@ -529,8 +527,7 @@ static int zynq_gem_init(struct udevice *dev)
> writel(nwcfg, ®s->nwcfg);
>
> #ifdef CONFIG_ARM64
> - if (priv->interface == PHY_INTERFACE_MODE_SGMII &&
> - priv->int_pcs) {
> + if (priv->interface == PHY_INTERFACE_MODE_SGMII) {
> /*
> * Disable AN for fixed link configuration, enable otherwise.
> * Must be written after PCS_SEL is set in nwconfig,
> @@ -992,8 +989,6 @@ static int zynq_gem_of_to_plat(struct udevice *dev)
> return -EINVAL;
> priv->interface = pdata->phy_interface;
>
> - priv->int_pcs = dev_read_bool(dev, "is-internal-pcspma");
> -
> priv->clk_en_info = dev_get_driver_data(dev);
>
> return 0;
Applied.
M
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