[PATCH] ARM: stm32: Fix secure_waitbits() mask check

[Marek Vasut]

On 7/8/24 1:43 PM, Marek Vasut wrote:
> Do not apply bitwise AND to register value and expected value, only
> apply bitwise AND to register value and mask, and only then compare
> the result with expected value that the function polls for.
> 
> Fixes: b49105320a5b ("stm32mp: psci: Implement PSCI system suspend and DRAM SSR")
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Patrice Chotard <patrice.chotard at foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay at foss.st.com>
> Cc: Tom Rini <trini at konsulko.com>
> Cc: u-boot at lists.denx.de
> Cc: uboot-stm32 at st-md-mailman.stormreply.com
> ---
>   arch/arm/mach-stm32mp/stm32mp1/psci.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-stm32mp/stm32mp1/psci.c b/arch/arm/mach-stm32mp/stm32mp1/psci.c
> index e99103910d9..ffdafea464d 100644
> --- a/arch/arm/mach-stm32mp/stm32mp1/psci.c
> +++ b/arch/arm/mach-stm32mp/stm32mp1/psci.c
> @@ -393,8 +393,7 @@ static int __secure secure_waitbits(u32 reg, u32 mask, u32 val)
>   	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (start));
>   	for (;;) {
>   		tmp = readl(reg);
> -		tmp &= mask;
> -		if ((tmp & val) == val)
> +		if ((tmp & mask) == val)
>   			return 0;
>   		asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (end));
>   		if ((end - start) > delay)

I hope this bugfix will make it into 2024.10 , can you prepare a bugfix 
PR for 2024.10 ?