[PATCH 1/5] mmc: fsl_esdhc_imx: Enable AHB/IPG clk
Peng Fan (OSS)
peng.fan at oss.nxp.com
Mon Sep 30 08:50:37 CEST 2024
From: Peng Fan <peng.fan at nxp.com>
Only enable PER clk is not enough, also need to enable AHB/IPG clk.
Reviewed-by: Ye Li <ye.li at nxp.com>
Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
drivers/mmc/fsl_esdhc_imx.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 03de7dcd505..f22b03657a3 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -148,6 +148,8 @@ struct fsl_esdhc_priv {
struct fsl_esdhc *esdhc_regs;
unsigned int sdhc_clk;
struct clk per_clk;
+ struct clk ipg_clk;
+ struct clk ahb_clk;
unsigned int clock;
unsigned int mode;
#if !CONFIG_IS_ENABLED(DM_MMC)
@@ -1521,6 +1523,24 @@ static int fsl_esdhc_probe(struct udevice *dev)
#if CONFIG_IS_ENABLED(CLK)
/* Assigned clock already set clock */
+ ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk);
+ if (!ret) {
+ ret = clk_enable(&priv->ipg_clk);
+ if (ret) {
+ printf("Failed to enable ipg_clk\n");
+ return ret;
+ }
+ }
+
+ ret = clk_get_by_name(dev, "ahb", &priv->ahb_clk);
+ if (!ret) {
+ ret = clk_enable(&priv->ahb_clk);
+ if (ret) {
+ printf("Failed to enable ahb_clk\n");
+ return ret;
+ }
+ }
+
ret = clk_get_by_name(dev, "per", &priv->per_clk);
if (ret) {
printf("Failed to get per_clk\n");
--
2.35.3
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