[PATCH v1 06/34] arm: socfpga: Enable ASYNC interrupts in Agilex SPL

[alif.zakuan.yuslaimi at altera.com]

From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>

Asynchronous aborts were previously masked at SPL
entry.

To ensure early detection of system errors
such as ECC faults or bus errors, asynchronous aborts
should be explicitly unmasked by clearing the A-bit in
the DAIF register during Agilex SPL initialization.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
---
 arch/arm/mach-socfpga/spl_agilex.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c
index 322a7ae6fc8..c2956264bc0 100644
--- a/arch/arm/mach-socfpga/spl_agilex.c
+++ b/arch/arm/mach-socfpga/spl_agilex.c
@@ -43,6 +43,9 @@ void board_init_f(ulong dummy)
 	int ret;
 	struct udevice *dev;
 
+	/* Enable Async */
+	asm volatile("msr daifclr, #4");
+
 	if (IS_ENABLED(CONFIG_XPL_BUILD))
 		spl_save_restore_data();
 
-- 
2.35.3