[PATCH v1 19/34] arch: arm: agilex: Clean up DT settings in U-Boot dtsi files

alif.zakuan.yuslaimi at altera.com alif.zakuan.yuslaimi at altera.com
Mon Aug 4 03:24:46 CEST 2025


From: Tingting Meng <tingting.meng at altera.com>

Reorganize misplaced properties by moving board-common settings from
socfpga_agilex_socdk-u-boot.dtsi to socfpga_agilex-u-boot.dtsi to maintain
proper separation between common and board-level configurations.

Signed-off-by: Tingting Meng <tingting.meng at altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
---
 arch/arm/dts/socfpga_agilex-u-boot.dtsi       | 20 +++++++++++++
 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 28 -------------------
 2 files changed, 20 insertions(+), 28 deletions(-)

diff --git a/arch/arm/dts/socfpga_agilex-u-boot.dtsi b/arch/arm/dts/socfpga_agilex-u-boot.dtsi
index 890ffc5f7c9..91674669886 100644
--- a/arch/arm/dts/socfpga_agilex-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_agilex-u-boot.dtsi
@@ -10,6 +10,13 @@
 #include "socfpga_soc64_fit-u-boot.dtsi"
 
 /{
+	aliases {
+		spi0 = &qspi;
+		i2c0 = &i2c1;
+		sysmgr = &sysmgr;
+		freeze_br0 = &freeze_controller;
+	};
+
 	memory {
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -19,6 +26,12 @@
 	soc {
 		bootph-all;
 
+		freeze_controller: freeze_controller at f9000450 {
+			compatible = "altr,freeze-bridge-controller";
+			reg = <0xf9000450 0x00000010>;
+			status = "disabled";
+		};
+
 		ccu: cache-controller at f7000000 {
 			compatible = "arteris,ncore-ccu";
 			reg = <0xf7000000 0x100900>;
@@ -45,6 +58,7 @@
 
 &i2c1 {
 	reset-names = "i2c";
+	status = "okay";
 };
 
 &i2c2 {
@@ -171,3 +185,9 @@
 &watchdog0 {
 	bootph-all;
 };
+
+#if !defined(CONFIG_SOCFPGA_SECURE_VAB_AUTH)
+&binman {
+	/delete-node/ kernel;
+};
+#endif
diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
index f9491d57068..c2770424d9c 100644
--- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
@@ -14,20 +14,6 @@
 		u-boot,spl-boot-order = &mmc,&flash0,&nand;
 	};
 
-	aliases {
-		spi0 = &qspi;
-		i2c0 = &i2c1;
-		freeze_br0 = &freeze_controller;
-	};
-
-	soc {
-		freeze_controller: freeze_controller at f9000450 {
-			compatible = "altr,freeze-bridge-controller";
-			reg = <0xf9000450 0x00000010>;
-			status = "disabled";
-		};
-	};
-
 	memory {
 		/* 8GB */
 		reg = <0 0x00000000 0 0x80000000>,
@@ -43,10 +29,6 @@
 	/delete-property/ cdns,read-delay;
 };
 
-&i2c1 {
-	status = "okay";
-};
-
 &nand {
 	status = "okay";
 	nand-bus-width = <16>;
@@ -62,13 +44,3 @@
 &qspi {
 	status = "okay";
 };
-
-&watchdog0 {
-	bootph-all;
-};
-
-#if !defined(CONFIG_SOCFPGA_SECURE_VAB_AUTH)
-&binman {
-	/delete-node/ kernel;
-};
-#endif
-- 
2.35.3



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