[PATCH v1 2/3] arch: arm: lib: cache_v8: agilex5: Add weak function in cache_v8

[Boon Khai Ng]

Add weak function dcache_disable for undefined symbol error
when dcache for SPL is not enabled. The dcache_disable function
is being called from spl_atf.c file

Add weak function dcache_status for undefined symbol error
when dcache for SPL is not enabled. The dcache_status function
is being called from common/memsize.c file "get_ram_size"
function, which in-turn was called from "sdram_size_check"
function defined in sdram_soc64.c file

Add weak function mmu_status for undefined symbol error
when dcache for SPL is not enabled. The mmu_status function
is being called from arch/arm/include/asm/io.h file "__memcpy_fromio"
and "__memcpy_toio "functions, which in-turn was called from
"cadence_qspi_apb_write_execute" and "cadence_qspi_apb_read_execute"
functions defined in cadence_qspi_apb.c file

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia at altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng at altera.com>
---
 arch/arm/lib/cache.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index ed6f15cb570..4762d84967c 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -42,6 +42,17 @@ __weak void enable_caches(void)
 	puts("WARNING: Caches not enabled\n");
 }
 
+__weak void dcache_disable(void)
+{
+	puts("WARNING: Data cache not enabled\n");
+}
+
+__weak int dcache_status(void)
+{
+	debug("WARNING: Data cache not enabled\n");
+	return 0;
+}
+
 __weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
 {
 	/* An empty stub, real implementation should be in platform code */
@@ -51,6 +62,12 @@ __weak void flush_dcache_range(unsigned long start, unsigned long stop)
 	/* An empty stub, real implementation should be in platform code */
 }
 
+__weak int mmu_status(void)
+{
+	puts("WARNING: MMU not enabled\n");
+	return 0;
+}
+
 int check_cache_range(unsigned long start, unsigned long stop)
 {
 	int ok = 1;
-- 
2.35.3