[PATCH 01/10] clk: rockchip: rk3368: fix gmac clock error

WeiHao Li cn.liweihao at gmail.com
Thu Aug 7 09:44:09 CEST 2025


Signed-off-by: WeiHao Li <ieiao at outlook.com>
---
 drivers/clk/rockchip/clk_rk3368.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 630253fbb1..6691801384 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -329,11 +329,9 @@ static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru, ulong set_rate)
 		ulong pll_rate;
 		u8 div;
 
-		if (((con >> GMAC_PLL_SHIFT) & GMAC_PLL_MASK) ==
-		    GMAC_PLL_SELECT_GENERAL)
+		if ((con & GMAC_PLL_MASK) == GMAC_PLL_SELECT_GENERAL)
 			pll_rate = GPLL_HZ;
-		else if (((con >> GMAC_PLL_SHIFT) & GMAC_PLL_MASK) ==
-			 GMAC_PLL_SELECT_CODEC)
+		else if ((con & GMAC_PLL_MASK) == GMAC_PLL_SELECT_CODEC)
 			pll_rate = CPLL_HZ;
 		else
 			/* CPLL is not set */
-- 
2.39.5



More information about the U-Boot mailing list