[PATCH v3 0/9] ram: k3-ddrss: Support partial inline ECC

[Neha Malcom Francis]

Currently, the inline ECC implementation enables inline ECC across the
entire DDR space. However this is not always required and a more common
ask is to have only a portion of the DDR protected as enabling ECC
impacts read/write performance metrics.

This series aims to modify the logic to firstly support partial inline
ECC in its' most basic form which works for single controllers. Then it
introduces an algorithm to support multi DDR controllers where
interleaving plays a role. Since interleaving is handled by the MSMC, it
only makes sense to have the MSMC decide the inline ECC ranges for each
DDR.

This series also introduces support for multiple partial regions of inline
ECC however due to complexity only support for single DDR is present now.

WIP: A commandline test case patch for verifying the correct behaviour
of inline ECC including partial case. Was targeted for v2 however a little
tricky to make it a general test case especially for multi-DDR cases, so
have not combined it in this series for now.

Testing:
- Memtester runs for J721S2 and J784S4 platforms with and without ECC
enablement runs fine.
- Along with patches that add support for the commandline test (see WIP
note above) J784S4 shows expected behavior for three sets of partial
inline ECC regions (non-overlapping, and after modifying J784S4 to have
single DDR instead of multi-DDR):
https://gist.github.com/nehamalcom/bde7e14e96485e4a188c3af3af6d75d6

Changes since v2:
https://lore.kernel.org/all/20250730133720.3315478-1-n-francis@ti.com/
- Minor corrections in integer size (s/u32/u64 for ddr_ram_size) (Udit)
- Small edits in commit message and inline code comments (Udit)

Changes since v1:
https://lore.kernel.org/all/20250127142217.1757300-1-n-francis@ti.com/
- Removed patch cleaning up a header file since it created warnings (Wadim)
- Minor changes not affecting logic of the patch, but cleaning it up (Udit)
- Rebased on top of latest master
- Added support for multiple partial inline ECC regions (note that this
support is only for single DDR controllers and not multi-DDR yet)

Neha Malcom Francis (9):
  ram: k3-ddrss: Use DDR address instead of system address for
    ecc_regions
  ram: k3-ddrss: s/K3_DDRSS_MAX_ECC_REGIONS/K3_DDRSS_MAX_ECC_REG
  ram: k3-ddrss: Add comment about ecc_reserved_space
  ram: k3-ddrss: Add support for a partial inline ECC region
  ram: k3-ddrss: Add CONFIG_K3_MULTI_DDR
  ram: k3-ddrss: Add support for number of controllers under MSMC
  ram: k3-ddrss: Add support for MSMC calculation of DDR inline ECC
    regions
  ram: k3-ddrss: Add support for partial inline ECC in multi-DDR systems
  ram: k3-ddrss: Support multiple ECC regions for a single controller

 drivers/ram/Kconfig             |  10 ++
 drivers/ram/k3-ddrss/k3-ddrss.c | 287 ++++++++++++++++++++++++++++++--
 2 files changed, 280 insertions(+), 17 deletions(-)

-- 
2.34.1