[PATCH] configs: socfpga: Add CRC32 support
Naresh Kumar Ravulapalli
nareshkumar.ravulapalli at altera.com
Tue Aug 19 06:24:04 CEST 2025
CRC32 support for SoC64 devices is added.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli at altera.com>
---
configs/socfpga_agilex_defconfig | 1 +
configs/socfpga_n5x_defconfig | 1 +
configs/socfpga_stratix10_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index 0b6194c1f27..638f8773397 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -39,6 +39,7 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x3fa00000
CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
+CONFIG_SPL_CRC32=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig
index 879556614f6..d501fcddf3d 100644
--- a/configs/socfpga_n5x_defconfig
+++ b/configs/socfpga_n5x_defconfig
@@ -37,6 +37,7 @@ CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x3fa00000
CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
CONFIG_SPL_CACHE=y
+CONFIG_SPL_CRC32=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
index 90134d8f3f3..fe191d09714 100644
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -41,6 +41,7 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x3fa00000
CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
+CONFIG_SPL_CRC32=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
--
2.35.3
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