[PATCH v2] mtd: nand: cadence: Fix device assignment to avoid warm reset issue

[Maniyam, Dinesh]

From: Michael Nazzareno Trimarchi <michael at amarulasolutions.com>
Sent: Tuesday, 19 August 2025 4:28 pm
To: Maniyam, Dinesh <dinesh.maniyam at altera.com>
Cc: u-boot at lists.denx.de; Marek <marex at denx.de>; Simon <simon.k.r.goldschmidt at gmail.com>; Simon Glass <sjg at chromium.org>; Tom Rini <trini at konsulko.com>; Dario Binacchi <dario.binacchi at amarulasolutions.com>; Chee, Tien Fong <tien.fong.chee at altera.com>; Hea, Kok Kiang <kok.kiang.hea at altera.com>; Ng, Boon Khai <boon.khai.ng at altera.com>; Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at altera.com>; Lim, Jit Loon <jit.loon.lim at altera.com>; Dinesh Maniyam <dinesh.maniyam at intel.com>
Subject: Re: [PATCH v2] mtd: nand: cadence: Fix device assignment to avoid warm reset issue


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Hi Dinesh

Please adjust your signature seems that intel.com<http://intel.com> domain is not valid

Michael

Hi,

Submitted v3. Signature adjusted.

Thanks!

On Tue, Aug 19, 2025 at 10:23 AM Michael Nazzareno Trimarchi <michael at amarulasolutions.com<mailto:michael at amarulasolutions.com>> wrote:


On Tue, Aug 19, 2025 at 9:16 AM <dinesh.maniyam at altera.com<mailto:dinesh.maniyam at altera.com>> wrote:
From: Dinesh Maniyam <dinesh.maniyam at intel.com<mailto:dinesh.maniyam at intel.com>>

The driver currently does:
    mtd->dev->parent = cadence->dev;

This works in Linux because `struct mtd_info` embeds a `struct device`,
so `mtd->dev` is always valid and its `.parent` can be set.

In U-Boot, however, `mtd->dev` is only a pointer to a `struct udevice`.
Dereferencing it before assignment is invalid, which breaks the device
hierarchy. As a result, consumers relying on `mtd->dev` (e.g. partition
parser, reset and re-init paths) operate on a dangling pointer. This
leads to failures during warm reset when the NAND device is accessed
again.

Fix by assigning the device pointer directly:
    mtd->dev = cadence->dev;

This matches U-Boot’s device model, preserves a valid hierarchy, and
resolves the warm reset issue on Cadence NAND.

Fixes: ebc41cad ("drivers: mtd: nand: Add driver for Cadence Nand")
Signed-off-by: Dinesh Maniyam <dinesh.maniyam at intel.com<mailto:dinesh.maniyam at intel.com>>
---

Reviewed-by: Michael Trimarchi <michael at amarulasolutions.com<mailto:michael at amarulasolutions.com>>

 drivers/mtd/nand/raw/cadence_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c
index 27aa7f97a45..4771440d1de 100644
--- a/drivers/mtd/nand/raw/cadence_nand.c
+++ b/drivers/mtd/nand/raw/cadence_nand.c
@@ -2196,7 +2196,7 @@ static int cadence_nand_chip_init(struct cadence_nand_info *cadence, ofnode node
        chip->controller = &cadence->controller;
        nand_set_flash_node(chip, node);
        mtd = nand_to_mtd(chip);
-       mtd->dev->parent = cadence->dev;
+       mtd->dev = cadence->dev;

        chip->options |= NAND_BUSWIDTH_AUTO;
        chip->select_chip = cadence_nand_select_chip;
--
2.35.3


--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael at amarulasolutions.com<mailto:michael at amarulasolutions.com>
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info at amarulasolutions.com<mailto:info at amarulasolutions.com>
www.amarulasolutions.com<http://www.amarulasolutions.com>


--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael at amarulasolutions.com<mailto:michael at amarulasolutions.com>
__________________________________

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info at amarulasolutions.com<mailto:info at amarulasolutions.com>
www.amarulasolutions.com<http://www.amarulasolutions.com>