[PATCH] fsl_dspi: set scaler values for CS-SCK and SCK-CS delays

Tomas Alvarez Vanoli tomas.alvarez-vanoli at hitachienergy.com
Wed Aug 20 10:17:19 CEST 2025


These values were calculated but not set.
They are required for the calculation of the delays, as stated in the
"QorIQ LS1043A Reference Manual, Rev. 6, 07/2020" page 2172.

The delays are calculated as (1/freq)*PCSSCK*CSSCK and
(1/freq)*PASC*ASC.

Signed-off-by: Tomas Alvarez Vanoli <tomas.alvarez-vanoli at hitachienergy.com>
---
 drivers/spi/fsl_dspi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index 545561ad116..412993ad377 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -473,7 +473,9 @@ static int fsl_dspi_child_pre_probe(struct udevice *dev)
 
 	priv->ctar_val[slave_plat->cs[0]] = DSPI_CTAR_DEFAULT_VALUE |
 					 DSPI_CTAR_PCSSCK(pcssck) |
-					 DSPI_CTAR_PASC(pasc);
+					 DSPI_CTAR_CSSCK(cssck) |
+					 DSPI_CTAR_PASC(pasc) |
+					 DSPI_CTAR_ASC(asc);
 
 	debug("DSPI pre_probe slave device on CS %u, max_hz %u, mode 0x%x.\n",
 	      slave_plat->cs[0], slave_plat->max_hz, slave_plat->mode);
-- 
2.43.0



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