[PATCH v3 1/3] rockchip: clk: clk_rk3576: Add dummy CLK_REF_PCIEx_PHY support

[Kever Yang]

On 2025/8/2 04:43, Jonas Karlman wrote:
> Add dummy support for the CLK_REF_PCIEx_PHY clocks to allow probe of the
> phy-rockchip-naneng-combphy driver on RK3576.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
> v3: No change
> v2: New patch
> ---
>   drivers/clk/rockchip/clk_rk3576.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clk/rockchip/clk_rk3576.c b/drivers/clk/rockchip/clk_rk3576.c
> index e84a0943a940..125b08ee8322 100644
> --- a/drivers/clk/rockchip/clk_rk3576.c
> +++ b/drivers/clk/rockchip/clk_rk3576.c
> @@ -2168,6 +2168,8 @@ static ulong rk3576_clk_set_rate(struct clk *clk, ulong rate)
>   	case CLK_CPLL_DIV10:
>   	case FCLK_DDR_CM0_CORE:
>   	case ACLK_PHP_ROOT:
> +	case CLK_REF_PCIE0_PHY:
> +	case CLK_REF_PCIE1_PHY:
>   		ret = 0;
>   		break;
>   #ifndef CONFIG_SPL_BUILD