[PATCH 3/3] configs: phycore_am64x_r5_defconfig: Enable PHYTEC_SOM_DETECTION

Daniel Schultz D.Schultz at phytec.de
Mon Feb 3 11:08:12 CET 2025


On 27.01.25 05:16, Wadim Egorov wrote:
> Enable configs required for detecting and fixing up for different RAM variants.
> Also resync after savedefconfig.
>
> Signed-off-by: Wadim Egorov <w.egorov at phytec.de>
Tested-by: Daniel Schultz <d.schultz at phytec.de>
> ---
>   configs/phycore_am64x_r5_defconfig | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/configs/phycore_am64x_r5_defconfig b/configs/phycore_am64x_r5_defconfig
> index 2d9ff95d781..a764298b186 100644
> --- a/configs/phycore_am64x_r5_defconfig
> +++ b/configs/phycore_am64x_r5_defconfig
> @@ -5,9 +5,9 @@ CONFIG_SYS_MALLOC_F_LEN=0x80000
>   CONFIG_SPL_GPIO=y
>   CONFIG_SPL_LIBCOMMON_SUPPORT=y
>   CONFIG_SPL_LIBGENERIC_SUPPORT=y
> -CONFIG_NR_DRAM_BANKS=2
>   CONFIG_SOC_K3_AM642=y
>   CONFIG_TARGET_PHYCORE_AM64X_R5=y
> +CONFIG_PHYTEC_SOM_DETECTION=y
>   CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>   CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7019b800
>   CONFIG_SF_DEFAULT_SPEED=25000000
> @@ -16,6 +16,7 @@ CONFIG_ENV_SIZE=0x20000
>   CONFIG_DM_GPIO=y
>   CONFIG_SPL_DM_SPI=y
>   CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-phycore-som-2gb"
> +CONFIG_OF_LIBFDT_OVERLAY=y
>   CONFIG_DM_RESET=y
>   CONFIG_SPL_MMC=y
>   CONFIG_SPL_SERIAL=y
> @@ -34,6 +35,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
>   CONFIG_SPL_SPI=y
>   CONFIG_SPL_LOAD_FIT=y
>   CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
> +CONFIG_OF_BOARD_SETUP=y
>   # CONFIG_DISPLAY_CPUINFO is not set
>   CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
>   CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y


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