[PATCH v2 3/3] arm: mach-k3: j784s4_init: Trigger LBIST and PBIST on MAIN R5 2_0

[Kumar, Udit]

On 2/4/2025 6:01 PM, Neha Malcom Francis wrote:
> Trigger all tests of PBIST and LBIST using appropriate calls to set the
> core under test (MAIN R5 2_0) to it's required state.
>
> Signed-off-by: Neha Malcom Francis <n-francis at ti.com>
> ---
>   arch/arm/mach-k3/j784s4/j784s4_init.c | 47 +++++++++++++++++++++++++++
>   1 file changed, 47 insertions(+)
>
> diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c
> index 787cf6261e4..f3df11f234f 100644
> --- a/arch/arm/mach-k3/j784s4/j784s4_init.c
> +++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
> @@ -17,6 +17,7 @@
>   #include <dm/pinctrl.h>
>   #include <mmc.h>
>   #include <remoteproc.h>
> +#include <k3_bist.h>
>   
>   #include "../sysfw-loader.h"
>   #include "../common.h"
> @@ -239,6 +240,8 @@ void k3_mem_init(void)
>   void board_init_f(ulong dummy)
>   {
>   	struct udevice *dev;
> +	__maybe_unused struct bist_ops *ops;
> +	__maybe_unused struct ti_sci_handle *handle;
>   	int ret;
>   
>   	k3_spl_init();
> @@ -251,6 +254,50 @@ void board_init_f(ulong dummy)
>   			printf("AVS init failed: %d\n", ret);
>   	}
>   
> +	if (!IS_ENABLED(CONFIG_CPU_V7R) && IS_ENABLED(CONFIG_K3_BIST)) {
> +		ret = uclass_get_device_by_driver(UCLASS_MISC,
> +						  DM_DRIVER_GET(k3_bist),
> +						  &dev);
> +		if (ret)
> +			panic("Failed to get BIST device: %d\n", ret);
> +
> +		ops = (struct bist_ops *)device_get_ops(dev);
> +		handle = get_ti_sci_handle();
> +
> +		/* get status of HW POST PBIST on MCU1_x */
> +		ret = ops->run_pbist_post();
> +		if (ret)
> +			panic("HW POST LBIST on MCU1_x failed: %d\n", ret);
> +
> +		/* trigger PBIST tests on MCU4_0 */
> +		ret = prepare_pbist(handle);
> +		ret |= ops->run_pbist_neg();
> +		ret |= deprepare_pbist(handle);
> +
> +		ret |= prepare_pbist(handle);
> +		ret |= ops->run_pbist();
> +		ret |= deprepare_pbist(handle);
> +
> +		ret |= prepare_pbist(handle);
> +		ret |= ops->run_pbist_rom();
> +		ret |= deprepare_pbist(handle);
> +
> +		if (ret)
> +			panic("PBIST on MCU4_0 failed: %d\n", ret);
> +
> +		/* get status of HW POST PBIST on MCU1_x */
> +		ret = ops->run_lbist_post();
> +		if (ret)
> +			panic("HW POST LBIST on MCU1_x failed: %d\n", ret);
> +
> +		/* trigger LBIST tests on MCU1_x */
> +		ret = prepare_lbist(handle);
> +		ret |= ops->run_lbist();
> +		ret |= deprepare_lbist(handle);
> +		if (ret)
> +			panic("LBIST on MCU4_0 failed: %d\n", ret);

For this patch

Reviewed-by: Udit Kumar <u-kumar1 at ti.com>


> +	}
> +
>   	if (IS_ENABLED(CONFIG_CPU_V7R))
>   		setup_navss_nb();
>