[PATCH v2 3/3] configs: phycore_am64x_r5_defconfig: Enable PHYTEC_SOM_DETECTION

[Wadim Egorov]

Enable configs required for detecting and fixing up for different RAM variants.
Also resync after savedefconfig.

Signed-off-by: Wadim Egorov <w.egorov at phytec.de>
Tested-by: Daniel Schultz <d.schultz at phytec.de>
---
v1: https://lists.denx.de/pipermail/u-boot/2025-January/578618.html
v2:
  - Rebase after 0e198ff1a911 ("configs: Resync with savedefconfig")
  - Add Tested-by from Daniel
  - Drop CONFIG_OF_BOARD_SETUP=y, Fixes:
    board/phytec/common/k3/board.c: In function 'fdt_apply_overlay_from_fit':
    board/phytec/common/k3/board.c:203:47: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
  203 |         return fdt_overlay_apply_verbose(fdt, (void *)loadaddr);
---
 configs/phycore_am64x_r5_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/phycore_am64x_r5_defconfig b/configs/phycore_am64x_r5_defconfig
index 6b0fd8d1402..d060a0f1d10 100644
--- a/configs/phycore_am64x_r5_defconfig
+++ b/configs/phycore_am64x_r5_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SOC_K3_AM642=y
 CONFIG_TARGET_PHYCORE_AM64X_R5=y
+CONFIG_PHYTEC_SOM_DETECTION=y
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7019b800
 CONFIG_SF_DEFAULT_SPEED=25000000
@@ -15,6 +16,7 @@ CONFIG_ENV_SIZE=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-phycore-som-2gb"
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_DM_RESET=y
 CONFIG_SPL_MMC=y
 CONFIG_SPL_SERIAL=y
-- 
2.34.1