[PATCH] rockchip: rk3399: grf: Fix enum typos for UART2

Kever Yang kever.yang at rock-chips.com
Wed Feb 19 16:06:21 CET 2025


On 2025/2/5 01:29, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens at csie.org>
>
> In the GRF header file, some instances of UART2 pinmux are prefixed with
> "GRF_UART2DBG" while others have "GRF_UART2DGB".
>
> Since UART2 is the default console UART and used for debugging, it is
> more likely the name should be UART2DBG.
>
> Fix the ones that are wrong.
>
> Fixes: a2c08df3813b ("pinctrl: add driver for rk3399")
> Fixes: fa72de10452c ("rockchip: arm64: rk3399: move grf register definitions to grf_rk3399.h")
> Signed-off-by: Chen-Yu Tsai <wens at csie.org>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>
>   arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 6 +++---
>   arch/arm/mach-rockchip/rk3399/rk3399.c          | 2 +-
>   2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
> index dd89cd205056..e6125d6bf540 100644
> --- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
> +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
> @@ -466,18 +466,18 @@ enum {
>   	/*  GRF_GPIO4C_IOMUX */
>   	GRF_GPIO4C0_SEL_SHIFT   = 0,
>   	GRF_GPIO4C0_SEL_MASK    = 3 << GRF_GPIO4C0_SEL_SHIFT,
> -	GRF_UART2DGBB_SIN       = 2,
> +	GRF_UART2DBGB_SIN       = 2,
>   	GRF_HDMII2C_SCL         = 3,
>   	GRF_GPIO4C1_SEL_SHIFT   = 2,
>   	GRF_GPIO4C1_SEL_MASK    = 3 << GRF_GPIO4C1_SEL_SHIFT,
> -	GRF_UART2DGBB_SOUT      = 2,
> +	GRF_UART2DBGB_SOUT      = 2,
>   	GRF_HDMII2C_SDA         = 3,
>   	GRF_GPIO4C2_SEL_SHIFT   = 4,
>   	GRF_GPIO4C2_SEL_MASK    = 3 << GRF_GPIO4C2_SEL_SHIFT,
>   	GRF_PWM_0               = 1,
>   	GRF_GPIO4C3_SEL_SHIFT   = 6,
>   	GRF_GPIO4C3_SEL_MASK    = 3 << GRF_GPIO4C3_SEL_SHIFT,
> -	GRF_UART2DGBC_SIN       = 1,
> +	GRF_UART2DBGC_SIN       = 1,
>   	GRF_GPIO4C4_SEL_SHIFT   = 8,
>   	GRF_GPIO4C4_SEL_MASK    = 3 << GRF_GPIO4C4_SEL_SHIFT,
>   	GRF_UART2DBGC_SOUT      = 1,
> diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
> index 1ce43c6f0d40..562d666ea092 100644
> --- a/arch/arm/mach-rockchip/rk3399/rk3399.c
> +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
> @@ -136,7 +136,7 @@ void board_debug_uart_init(void)
>   	/* Enable early UART2 channel C on the RK3399 */
>   	rk_clrsetreg(&grf->gpio4c_iomux,
>   		     GRF_GPIO4C3_SEL_MASK,
> -		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
> +		     GRF_UART2DBGC_SIN << GRF_GPIO4C3_SEL_SHIFT);
>   	rk_clrsetreg(&grf->gpio4c_iomux,
>   		     GRF_GPIO4C4_SEL_MASK,
>   		     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);


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