[PATCH v3 09/15] board: ti: am62px: evm: Enable cache for AM62p

[Chintan Vankar]

From: Andreas Dannenberg <dannenberg at ti.com>

Enable cache for AM62p to optimize performance of CPU to access data from
memory.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin at siemens.com>
Signed-off-by: Andreas Dannenberg <dannenberg at ti.com>
Signed-off-by: Chintan Vankar <c-vankar at ti.com>
---

Link to v2:
https://lore.kernel.org/r/20250219104831.2315464-11-c-vankar@ti.com/

Changes from v2 to v3:
- No changes in the patch, collected Reviewed-by tag from Alexander
  Sverdlin.

 board/ti/am62px/evm.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c
index 75359fa1614..0be9817064b 100644
--- a/board/ti/am62px/evm.c
+++ b/board/ti/am62px/evm.c
@@ -9,6 +9,7 @@
 #include <efi_loader.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
+#include <cpu_func.h>
 #include <dm/uclass.h>
 #include <env.h>
 #include <fdt_support.h>
@@ -54,6 +55,13 @@ int board_init(void)
 	return 0;
 }
 
+#if IS_ENABLED(CONFIG_SPL_BUILD)
+void spl_board_init(void)
+{
+	enable_caches();
+}
+#endif
+
 #if defined(CONFIG_XPL_BUILD)
 void spl_perform_fixups(struct spl_image_info *spl_image)
 {
-- 
2.34.1