[PATCH v2 0/5] Create FPGA Partial Reconfiguration (fpga pr) command

[Michal Simek]

On 5/24/25 22:37, Naresh Kumar Ravulapalli wrote:
> Partial Reconfiguration (pr) FPGA command is added to U-Boot console.
> The "fpga pr" command supports multiple regions for partial
> reconfiguration by specifying the region number. The implementation
> of the command is specific to the underlying FPGA device.
> 
> In case of Altera, it is used to freeze the specified partial
> reconfiguration region, then user loading the reconfiguration image
> followed by unfreezing of the region.
> 
> Test set currently can't be added as the command is implementation
> specific. It involves opening of FPGA bridges and loading of external
> images during run time. Currently, existing FPGA commands don't
> have any tests/sandbox environment. The design is being worked on,
> but would take some more time to share and get the community
> feedback.
> 
> Changes in v2:
> - Change the command implementation to generic FPGA command
> - Add usage documentation for the command
> - Correct "_" with "-" in alias name in Altera dts files
> - Add FPGA partial reconfiguration support for Altera devices
> - Address minor comments in v1

I think this requires a little big deeper discussion how this is supposed to be 
working. I expect you are adding PR support because you need it for booting or 
you need to load things to fpga before you go to OS with maybe some changes in DT.

You are getting freeze controller address based on aliases but that is tighten 
to fpga region. It means I don't understand why you are using aliases instead of 
following current fpga-region/fpga-bridge DT schema which identify bridges via 
fpga-bridges property inside fpga region.

Thanks,
Michal