AARCH64 clean bss bug
Ilias Apalodimas
ilias.apalodimas at linaro.org
Tue Jul 1 19:08:55 CEST 2025
Hi Brock
On Sun Jun 29, 2025 at 7:37 AM EEST, brock_zheng wrote:
>
> Hi, all
>
> I found a bug on AARCH64 platform about clean .bss section after relocating.
>
> In crt0_64.S, it use instruction 'ldr' to load the start/stop
> address of BSS after relocating. My testing shows that
> __bss_start loaded successfuly, but 'x1 <= __bss_end' got the
> address _BEFORE_ allocating.o
One of the problems when using the literal pool is that the access is PC-relative, but
the entry itself contains an asbolute address. This code runs after relocation right?
It the literal pool entries relocated?
Any idea why __bss_end is wrong? It would be helpful to have a more complete commit message
>
> If I swap the two instruction sequence, the result is swapped
> also. But neither code can gives the right result of those two
> addesses _AFTER_ relocation.
>
> my patch use 'adr' instead of 'ldr', seems OK for my RK3568 chip.
Uisng adr for linker symbols is fine, but can you please use adrp+add instead of adr?
Thanks
/Ilias
>
>
> --
> Brock Zheng <yzheng at techyauld.com>
> 郑 祎
>
> 北京中科腾越科技发展有限公司
> 北京市 海淀区 东北旺西路8号 中关村软件园27号院 千方大厦A座2层 (邮编:100193)
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