[PATCH] pinctrl: renesas: Initial RZ/A2 R7S9210 support

Marek Vasut marek.vasut at mailbox.org
Mon Jul 7 17:29:55 CEST 2025


> +DECLARE_GLOBAL_DATA_PTR;

See comment in r7s9210_pfc_set_state() below.

> +struct r7s9210_pfc_plat {
> +	void __iomem	*base;
> +};
> +
> +static void r7s9210_pfc_set_function(struct udevice *dev, u8 port, u8 pin, u8 func)
> +{
> +	struct r7s9210_pfc_plat *plat = dev_get_plat(dev);
> +	u16 reg16, mask16;
> +
> +	/* Set pin to 'Non-use (Hi-z input protection)' */
> +	reg16 = readw(plat->base + PDR_BASE + (port * 2));
> +	mask16 = 0x03 << (pin * 2);
> +	reg16 &= ~mask16;
> +	writew(reg16, plat->base + PDR_BASE + (port * 2));

Use clrsetbits_le16().

> +	/* Temporary switch to GPIO */
> +	clrbits_8(plat->base + PMR_BASE + port, BIT(pin));
> +
> +	/* PFS Register Write Protect : OFF */
> +	writeb(0x00, plat->base + PWPR); /* B0WI=0, PFSWE=0 */
> +	writeb(0x40, plat->base + PWPR); /* B0WI=0, PFSWE=1 */
> +
> +	/* Set Pin function (interrupt disabled, ISEL=0) */
> +	writeb(func, plat->base + PFS_BASE + (port * 8) + pin);
> +
> +	/* PFS Register Write Protect : ON */
> +	writeb(0x00, plat->base + PWPR); /* B0WI=0, PFSWE=0 */
> +	writeb(0x80, plat->base + PWPR); /* B0WI=1, PFSWE=0 */
> +
> +	/* Port Mode : Peripheral module pin functions */
> +	setbits_8(plat->base + PMR_BASE + port, BIT(pin));
> +}
> +
> +static int r7s9210_pfc_set_state(struct udevice *dev, struct udevice *config)
> +{
> +	const void *blob = gd->fdt_blob;
> +	int node = dev_of_offset(config);
> +	u32 cells[32];
> +	u16 bank, line, func;
> +	int i, count;
> +
> +	count = fdtdec_get_int_array_count(blob, node, "pinmux",
> +					   cells, ARRAY_SIZE(cells));

Use dev_read_u32_array() and then you won't need the gd->fdt_blob 
reference at all, and you can also drop DECLARE_GLOBAL_DATA_PTR; from 
this driver.

> +	if (count < 0) {
> +		printf("%s: bad pinmux array %d\n", __func__, count);
> +		return -EINVAL;
> +	}
[...]


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