[RFC PATCH 1/4] Revert "arm: asm/system.h: mrc and mcr need .arm if __thumb2__ is not set"
Jerome Forissier
jerome.forissier at linaro.org
Tue Jul 8 12:02:47 CEST 2025
This reverts commit 6fe50e39508043f386fc1bd40bbc02b8a75c1940 which does
not work with LTO and for which a workaround was introduced in commit
410d59095a9f ("arm: kirkwood: fix freeze on boot").
Signed-off-by: Jerome Forissier <jerome.forissier at linaro.org>
---
arch/arm/include/asm/system.h | 22 +++++-----------------
arch/arm/lib/cache.c | 5 ++---
arch/arm/mach-kirkwood/include/mach/cpu.h | 9 ++++-----
3 files changed, 11 insertions(+), 25 deletions(-)
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 4c1b81483c9..849b3d0efb7 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -428,21 +428,11 @@ void switch_to_hypervisor_ret(void);
#define wfi()
#endif
-#if !defined(__thumb2__)
-/*
- * We will need to switch to ARM mode (.arm) for some instructions such as
- * mrc p15 etc.
- */
-#define asm_arm_or_thumb2(insn) asm volatile(".arm\n\t" insn)
-#else
-#define asm_arm_or_thumb2(insn) asm volatile(insn)
-#endif
-
static inline unsigned long read_mpidr(void)
{
unsigned long val;
- asm_arm_or_thumb2("mrc p15, 0, %0, c0, c0, 5" : "=r" (val));
+ asm volatile("mrc p15, 0, %0, c0, c0, 5" : "=r" (val));
return val;
}
@@ -471,13 +461,11 @@ static inline unsigned int get_cr(void)
unsigned int val;
if (is_hyp())
- asm_arm_or_thumb2("mrc p15, 4, %0, c1, c0, 0 @ get CR"
- : "=r" (val)
+ asm volatile("mrc p15, 4, %0, c1, c0, 0 @ get CR" : "=r" (val)
:
: "cc");
else
- asm_arm_or_thumb2("mrc p15, 0, %0, c1, c0, 0 @ get CR"
- : "=r" (val)
+ asm volatile("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val)
:
: "cc");
return val;
@@ -486,11 +474,11 @@ static inline unsigned int get_cr(void)
static inline void set_cr(unsigned int val)
{
if (is_hyp())
- asm_arm_or_thumb2("mcr p15, 4, %0, c1, c0, 0 @ set CR" :
+ asm volatile("mcr p15, 4, %0, c1, c0, 0 @ set CR" :
: "r" (val)
: "cc");
else
- asm_arm_or_thumb2("mcr p15, 0, %0, c1, c0, 0 @ set CR" :
+ asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" :
: "r" (val)
: "cc");
isb();
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index ed6f15cb570..dd19bd3e4fb 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -10,7 +10,6 @@
#include <malloc.h>
#include <asm/cache.h>
#include <asm/global_data.h>
-#include <asm/system.h>
#include <linux/errno.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -127,8 +126,8 @@ void invalidate_l2_cache(void)
{
unsigned int val = 0;
- asm_arm_or_thumb2("mcr p15, 1, %0, c15, c11, 0 @ invl l2 cache"
- : : "r" (val) : "cc");
+ asm volatile("mcr p15, 1, %0, c15, c11, 0 @ invl l2 cache"
+ : : "r" (val) : "cc");
isb();
}
#endif
diff --git a/arch/arm/mach-kirkwood/include/mach/cpu.h b/arch/arm/mach-kirkwood/include/mach/cpu.h
index dce190ddee2..9eec786fe8f 100644
--- a/arch/arm/mach-kirkwood/include/mach/cpu.h
+++ b/arch/arm/mach-kirkwood/include/mach/cpu.h
@@ -85,9 +85,8 @@ struct mbus_win {
static inline unsigned int readfr_extra_feature_reg(void)
{
unsigned int val;
-
- asm_arm_or_thumb2("mrc p15, 1, %0, c15, c1, 0 @ readfr exfr":"=r"
- (val)::"cc");
+ asm volatile ("mrc p15, 1, %0, c15, c1, 0 @ readfr exfr":"=r"
+ (val)::"cc");
return val;
}
@@ -97,8 +96,8 @@ static inline unsigned int readfr_extra_feature_reg(void)
*/
static inline void writefr_extra_feature_reg(unsigned int val)
{
- asm_arm_or_thumb2("mcr p15, 1, %0, c15, c1, 0 @ writefr exfr"::"r"
- (val):"cc");
+ asm volatile ("mcr p15, 1, %0, c15, c1, 0 @ writefr exfr"::"r"
+ (val):"cc");
isb();
}
--
2.43.0
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