[PATCH 01/17] clk: px30: Allow use of GPU and WIFI_PMU in assigned-clocks
Quentin Schulz
quentin.schulz at cherry.de
Tue Jul 15 11:29:53 CEST 2025
Hi Jonas,
On 7/14/25 1:33 AM, Jonas Karlman wrote:
> Add dummy implementation of set_rate for SCLK_GPU and SCLK_WIFI_PMU to
> allow use of dts/upstream assigned-clocks in cru and pmucru nodes.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
> ---
> drivers/clk/rockchip/clk_px30.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
> index ad7e1c0f2460..b5054e84c326 100644
> --- a/drivers/clk/rockchip/clk_px30.c
> +++ b/drivers/clk/rockchip/clk_px30.c
> @@ -1360,6 +1360,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
> case SCLK_GMAC_RMII:
> ret = px30_mac_set_speed_clk(priv, rate);
> break;
> + /* Might occur in cru assigned-clocks, can be ignored here */
> + case SCLK_GPU:
> + break;
Seems to only be used for the GPU and the power domain of the GPU. I
don't think we're planning on making use of the GPU in U-Boot until a
long time so this is fine.
> #endif
> default:
> return -ENOENT;
> @@ -1726,6 +1729,9 @@ static ulong px30_pmuclk_set_rate(struct clk *clk, ulong rate)
> case SCLK_UART0_PMU:
> ret = px30_pmu_uart0_set_clk(priv, rate);
> break;
> + /* Might occur in pmucru assigned-clocks, can be ignored here */
> + case SCLK_WIFI_PMU:
> + break;
Seems like the only use-case for this clock is generating a clock output
on gpio0_a0 which requires a pinmux different from the default GPIO
function. I don't see any DT (px30 or rk3326) making use of that pin
that way, so looks good to me too, therefore:
Reviewed-by: Quentin Schulz <quentin.schulz at cherry.de>
Thanks!
Quentin
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