[PATCH 2/5] riscv: cpu: th1520: Limit upper RAM boundary to 4 GiB
Leo Liang
ycliang at andestech.com
Thu Jul 17 07:51:18 CEST 2025
On Thu, Jul 10, 2025 at 03:41:58AM +0000, Yao Zi wrote:
> TH1520 SoC ships DMA peripherals that could only reach the first 32-bit
> range of memory, for example, the GMAC controllers. Let's limit the
> usable top of RAM below 4GiB to ensure DMA allocations are accessible to
> all peripherals.
>
> Signed-off-by: Yao Zi <ziyao at disroot.org>
> ---
> arch/riscv/cpu/th1520/dram.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>
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