[PATCH] RZ/A1 Genmai SDRAM setup prototype

[Marek Vasut]

On 7/11/25 9:35 AM, Magnus Damm wrote:

Hello Magnus,

sorry for the late reply.

> Here's a hack that adds SDRAM setup code to the r7s72100 Genmai board.
> 
> Might be useful in case someone wants to boot Linux on the Genmai board.
> 
> Before merge a few unclear points remain:
>   - How to make best use of the on-chip SDRAM?
>     The U-Boot DTS currently has a node for the 10 MiB at 0x20000000
>     Also used by CONFIG_CUSTOM_SYS_INIT_SP_ADDR in renesas_rza1.config

Can we use SRAM for U-Boot and (optional) SDRAM for Linux ?

[...]

> --- 0001/board/renesas/genmai/genmai.c
> +++ work/board/renesas/genmai/genmai.c	2025-07-11 16:11:32.621707802 +0900
> @@ -12,6 +12,16 @@
>   #define CS0WCR		(RZA1_BCR_BASE + 0x28)
>   #define CS1BCR		(RZA1_BCR_BASE + 0x08)
>   #define CS1WCR		(RZA1_BCR_BASE + 0x2c)
> +#define CS2BCR		(RZA1_BCR_BASE + 0x0c)
> +#define CS2WCR		(RZA1_BCR_BASE + 0x30)
> +#define CS3BCR		(RZA1_BCR_BASE + 0x10)
> +#define CS3WCR		(RZA1_BCR_BASE + 0x34)
> +#define SDCR		(RZA1_BCR_BASE + 0x4c)
> +#define RTCOR		(RZA1_BCR_BASE + 0x58)
> +#define RTCSR		(RZA1_BCR_BASE + 0x50)
> +
> +#define SDRAM_MODE_CS2 0x3FFFD040 /* CS2: CAS=2, burst write, 16bit bus */
> +#define SDRAM_MODE_CS3 0x3FFFE040 /* CS3: CAS=2, burst write, 16bit bus */

It would be good to convert this to 'memory' driver instead, see e.g.:

6d47598629f6 ("memory: stm32-fmc2-ebi: add STM32 FMC2 EBI controller 
driver")

Hacking more of this memory mapping into board files does not scale well.

>   DECLARE_GLOBAL_DATA_PTR;
>   
> @@ -27,23 +37,101 @@ int board_init(void)
>   	return 0;
>   }
>   
> -/*
> - * The Genmai DT will most likely contain memory nodes describing the external
> - * SDRAM memory connected to CS2 and CS3, however we do not yet have any code
> - * in U-Boot to setup the memory controller. For now ignore DT and make use of
> - * the RZ/A1H on-chip memory which is 10 MiB at CFG_SYS_SDRAM_BASE.
> - */
> +// nicked from pinctrl-rza1.c

Can this be configured using pinctrl-rza1.c , maybe once the 'memory' 
driver which would configure the chipselects is in place ?

[...]

The external memory (DRAM) could even be brought up using drivers/ram/ 
driver ?