[PATCH] arch: arm: dts: agilex5: Set spi-max-freq to 50Mhz

[Chee, Tien Fong]

> -----Original Message-----
> From: Maniyam, Dinesh <dinesh.maniyam at altera.com>
> Sent: Thursday, July 10, 2025 12:39 PM
> To: u-boot at lists.denx.de
> Cc: Marek <marex at denx.de>; Simon <simon.k.r.goldschmidt at gmail.com>;
> Simon Glass <sjg at chromium.org>; Tom Rini <trini at konsulko.com>; Chee,
> Tien Fong <tien.fong.chee at altera.com>; Hea, Kok Kiang
> <kok.kiang.hea at altera.com>; Maniyam, Dinesh
> <dinesh.maniyam at altera.com>; Ng, Boon Khai <boon.khai.ng at altera.com>;
> Yuslaimi, Alif Zakuan <alif.zakuan.yuslaimi at altera.com>; Lim, Jit Loon
> <jit.loon.lim at altera.com>; Dinesh Maniyam <dinesh.maniyam at intel.com>
> Subject: [PATCH] arch: arm: dts: agilex5: Set spi-max-freq to 50Mhz
> 
> From: Dinesh Maniyam <dinesh.maniyam at intel.com>
> 
> This patch is to set spi-max-freq to 50Mhz. This will add support to the driver
> to set the operation speed according to the slave device up to 50Mhz.
> Without this node, the driver just can adjust the operation speed to the
> default speed which is far below the best operation speed of the SPI slave
> device.
> 
> Signed-off-by: Dinesh Maniyam <dinesh.maniyam at intel.com>
> ---
>  arch/arm/dts/socfpga_agilex5.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/dts/socfpga_agilex5.dtsi
> b/arch/arm/dts/socfpga_agilex5.dtsi
> index 86322d7b0ce..9bc3864022b 100644
> --- a/arch/arm/dts/socfpga_agilex5.dtsi
> +++ b/arch/arm/dts/socfpga_agilex5.dtsi
> @@ -388,6 +388,7 @@
>  			reg-io-width = <4>;
>  			num-cs = <4>;
>  			clocks = <&clkmgr AGILEX5_L4_MAIN_CLK>;
> +			spi-max-frequency = <50000000>;
>  			status = "disabled";
>  		};
> 
> @@ -402,6 +403,7 @@
>  			reg-io-width = <4>;
>  			num-cs = <4>;
>  			clocks = <&clkmgr AGILEX5_L4_MAIN_CLK>;
> +			spi-max-frequency = <50000000>;
>  			status = "disabled";
>  		};
> 
> --
> 2.35.3

Reviewed-by: Tien Fong Chee <tien.fong.chee at altera.com>

Best regards,
Tien Fong