[PATCH v2 6/9] ram: k3-ddrss: Add support for number of controllers under MSMC

[Neha Malcom Francis]

In K3 multi-DDR systems, the MSMC is responsible for the interleave
mechanism across all the DDR controllers. Add support for MSMC to obtain
the number of controllers it's responsible for using the DT.

Signed-off-by: Neha Malcom Francis <n-francis at ti.com>
---
 drivers/ram/k3-ddrss/k3-ddrss.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c
index cd117d7eba7..2d2558eaa9e 100644
--- a/drivers/ram/k3-ddrss/k3-ddrss.c
+++ b/drivers/ram/k3-ddrss/k3-ddrss.c
@@ -127,6 +127,7 @@ struct k3_msmc {
 	enum ecc_enable enable;
 	enum emif_config config;
 	enum emif_active active;
+	u32 num_ddr;
 };
 
 #define K3_DDRSS_MAX_ECC_REG		3
@@ -1007,6 +1008,13 @@ static int k3_msmc_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	ret = device_get_child_count(dev);
+	if (ret <= 0) {
+		dev_err(dev, "no child ddr nodes present");
+		return -EINVAL;
+	}
+	msmc->num_ddr = ret;
+
 	return 0;
 }
 
-- 
2.34.1