[PATCH 7/9] ddr: imx9: Add Synopsys LPDDR training data collect

[Neha Malcom Francis]

On 28/07/25 08:54, Peng Fan (OSS) wrote:
> From: Viorel Suman <viorel.suman at nxp.com>
> 
> Add the functionality required for collecting Synopsys LPDDR training
> data in SPL context.
> 
> Signed-off-by: Viorel Suman <viorel.suman at nxp.com>
> Signed-off-by: Peng Fan <peng.fan at nxp.com>
> ---

[...]

>  endif
> diff --git a/drivers/ddr/imx/phy/ddrphy_qb_gen.c b/drivers/ddr/imx/phy/ddrphy_qb_gen.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..d77bb8480d85770d29e4408c2a723b20377833f0
> --- /dev/null
> +++ b/drivers/ddr/imx/phy/ddrphy_qb_gen.c
> @@ -0,0 +1,1842 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2025 NXP
> + */
> +
> +#include <asm/arch/ddr.h>
> +#include <linux/errno.h>
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <u-boot/crc.h>
> +
> +static const u32 ddrphy_csr_cfg[DDRPHY_QB_CSR_SIZE] = {
> +	0x00090201,
> +	0x00090202,
> +	0x00090203,
> +	0x00090204,
> +	0x00090205,
> +	0x00090206,

[...]

Are these CSR values likely to change from time to time?

> +	0x000110a1,
> +	0x000110a2,
> +	0x000110a3,
> +	0x000110a4,
> +	0x000110a5,
> +	0x000110a6,
> +	0x000110a7,
> +	0x00011000,
> +	0x0001104a,
> +};
> +
> +static const u32 ddrphy_fsp_cfg[DDRPHY_QB_FSP_SIZE] = {
> +	0x00054026, /* TrainedVREFDQ_A0,   Byte offset 0x4d,      CSR Addr 0x54026 */
> +	0x00054027, /* TrainedVREFDQ_A1,   Byte offset 0x4e,      CSR Addr 0x54027 */
> +	0x00054040, /* TrainedVREFDQ_B0&1, Byte offset 0x80&0x81, CSR Addr 0x54040 */
> +};
> +
> +struct ddrphy_qb_state qb_state;
> +
> +int ddrphy_qb_save(void)
> +{
> +	int i;
> +
> +	/* enable the ddrphy apb */
> +	dwc_ddrphy_apb_wr(0xd0000, 0x0);
> +
> +	for (i = 0; i < DDRPHY_QB_CSR_SIZE; i++)
> +		qb_state.csr[i] = dwc_ddrphy_apb_rd(ddrphy_csr_cfg[i]);
> +
> +	/* disable the ddrphy apb */
> +	dwc_ddrphy_apb_wr(0xd0000, 0x1);
> +
> +	qb_state.crc = crc32(0, (void *)&qb_state.flags, DDRPHY_QB_STATE_SIZE);
> +	return 0;
> +}
> +
> +void ddrphy_init_read_msg_block(enum fw_type type)
> +{
> +	int i;
> +
> +	if (type != FW_2D_IMAGE)
> +		return;
> +
> +	qb_state.flags |= DDRPHY_QB_FLAG_2D;
> +	for (i = 0; i < DDRPHY_QB_FSP_SIZE; i++)
> +		qb_state.fsp[i] = dwc_ddrphy_apb_rd(ddrphy_fsp_cfg[i]);
> +}
> diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c
> index 8e350de8315e40372f583c7a84c3ee5ed8b827d9..33275656469ecc24853f228b760229572e73aa48 100644
> --- a/drivers/ddr/imx/phy/ddrphy_utils.c
> +++ b/drivers/ddr/imx/phy/ddrphy_utils.c
> @@ -184,6 +184,6 @@ void ddrphy_init_set_dfi_clk(unsigned int drate)
>  	}
>  }
>  
> -void ddrphy_init_read_msg_block(enum fw_type type)
> +__weak void ddrphy_init_read_msg_block(enum fw_type type)
>  {
>  }
> 

-- 
Thanking You
Neha Malcom Francis