[PATCH 2/3] pwm: stm32: add support for stm32mp25
Patrice CHOTARD
patrice.chotard at foss.st.com
Thu Jul 31 11:15:07 CEST 2025
On 7/28/25 11:03, Patrice CHOTARD wrote:
>
>
> On 6/20/25 17:49, Cheick Traore wrote:
>> Add support for STM32MP25 SoC.
>> IPIDR register is used to check the hardware configuration register
>> when available to gather the number of complementary outputs.
>>
>> Signed-off-by: Cheick Traore <cheick.traore at foss.st.com>
>> ---
>>
>> drivers/pwm/pwm-stm32.c | 11 ++++++++++-
>> 1 file changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
>> index 5fa649b5903..a691f75e4a7 100644
>> --- a/drivers/pwm/pwm-stm32.c
>> +++ b/drivers/pwm/pwm-stm32.c
>> @@ -12,6 +12,7 @@
>> #include <asm/io.h>
>> #include <asm/arch/timers.h>
>> #include <dm/device_compat.h>
>> +#include <linux/bitfield.h>
>> #include <linux/time.h>
>>
>> #define CCMR_CHANNEL_SHIFT 8
>> @@ -157,7 +158,14 @@ static void stm32_pwm_detect_complementary(struct udevice *dev)
>> {
>> struct stm32_timers_plat *plat = dev_get_plat(dev_get_parent(dev));
>> struct stm32_pwm_priv *priv = dev_get_priv(dev);
>> - u32 ccer;
>> + u32 ccer, val;
>> +
>> + if (plat->ipidr) {
>> + /* Simply read from HWCFGR the number of complementary outputs (MP25). */
>> + val = readl(plat->base + TIM_HWCFGR1);
>> + priv->have_complementary_output = !!FIELD_GET(TIM_HWCFGR1_NB_OF_DT, val);
>> + return;
>> + }
>>
>> /*
>> * If complementary bit doesn't exist writing 1 will have no
>> @@ -192,6 +200,7 @@ static const struct pwm_ops stm32_pwm_ops = {
>>
>> static const struct udevice_id stm32_pwm_ids[] = {
>> { .compatible = "st,stm32-pwm" },
>> + { .compatible = "st,stm32mp25-pwm" },
>> { }
>> };
>>
>
> Hi Cheick
>
> Reviewed-by: Patrice Chotard <patrice.chotard at foss.st.com>
>
> Thanks
Applied to u-boot-stm32/master
Thanks
Patrice
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