[PATCH v2 2/2] spi: coreqspi: add xfer function for PolarFire SoC

[Leo Liang]

On Thu, May 29, 2025 at 03:51:12PM +0530, Eoin Dickson wrote:
> [EXTERNAL MAIL]
> 
> From: Eoin Dickson <eoin.dickson at microchip.com>
> 
> Add xfer function to PolarFire SoC coreqspi driver. The read and write
> operations are limited to one byte at a time instead of four as CMD18
> (multiple block read) reads garbage when four byte ops are enabled.
> 
> Signed-off-by: Eoin Dickson <eoin.dickson at microchip.com>
> ---
>  drivers/spi/microchip_coreqspi.c | 113 ++++++++++++++++++++++++++++++-
>  1 file changed, 111 insertions(+), 2 deletions(-)

Acked-by: Leo Yu-Chi Liang <ycliang at andestech.com>