[PATCH v2 0/5] Create FPGA Partial Reconfiguration (fpga pr) command

Ravulapalli, Naresh Kumar nareshkumar.ravulapalli at altera.com
Tue Jun 10 09:08:19 CEST 2025


Hi Michal

I need your help to review the following patch series; please help.

On 28-May-25 4:41 PM, Ravulapalli, Naresh Kumar wrote:
> Hi Simon
> 
> On 25-May-25 11:35 PM, Simon Glass wrote:
> 
>> Hi Naresh,
>>
>> On Sat, 24 May 2025 at 21:37, Naresh Kumar Ravulapalli
>> <nareshkumar.ravulapalli at altera.com> wrote:
>>>
>>> Partial Reconfiguration (pr) FPGA command is added to U-Boot console.
>>> The "fpga pr" command supports multiple regions for partial
>>> reconfiguration by specifying the region number. The implementation
>>> of the command is specific to the underlying FPGA device.
>>>
>>> In case of Altera, it is used to freeze the specified partial
>>> reconfiguration region, then user loading the reconfiguration image
>>> followed by unfreezing of the region.
>>>
>>> Test set currently can't be added as the command is implementation
>>> specific. It involves opening of FPGA bridges and loading of external
>>> images during run time. Currently, existing FPGA commands don't
>>> have any tests/sandbox environment. The design is being worked on,
>>> but would take some more time to share and get the community
>>> feedback.
>>>
>>> Changes in v2:
>>> - Change the command implementation to generic FPGA command
>>> - Add usage documentation for the command
>>> - Correct "_" with "-" in alias name in Altera dts files
>>> - Add FPGA partial reconfiguration support for Altera devices
>>> - Address minor comments in v1
>>>
>>> Naresh Kumar Ravulapalli (5):
>>>    drivers: fpga: Add generic partial reconfiguration support
>>>    cmd: Add partial reconfiguration command
>>>    doc: usage: cmd: Add documentation for fpga pr command
>>>    arch: arm: dts: Correct alias name for Altera SoCs
>>>    drivers: fpga: Add partial reconfig support for Altera SoCs
>>>
>>>   .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi |   2 +-
>>>   arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi |   3 +-
>>>   .../dts/socfpga_stratix10_socdk-u-boot.dtsi   |   3 +-
>>>   cmd/Kconfig                                   |   8 +
>>>   cmd/fpga.c                                    |  38 ++++
>>>   doc/usage/cmd/fpga.rst                        |  65 +++++++
>>>   drivers/fpga/Kconfig                          |   7 +
>>>   drivers/fpga/altera.c                         | 163 ++++++++++++++++++
>>>   drivers/fpga/fpga.c                           |  37 ++++
>>>   include/altera.h                              |   7 +
>>>   include/fpga.h                                |   3 +
>>>   11 files changed, 333 insertions(+), 3 deletions(-)
>>>   create mode 100644 doc/usage/cmd/fpga.rst
>>>
>>> -- 
>>> 2.35.3
>>>
>>
>> How about creating a uclass for FPGA, with an API? I think it would
>> help to make things more uniform.
> 
> Yes, I agree. While going through the existing FPGA commands, I also
> feel we need to refactor them for uniformity. But this patch series is 
> about adding a command with existing framework, I would like to keep 
> both tasks isolated.
> 
> I will push the refactoring work as a separate patch series.

Kind Regards
Naresh



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