[PATCH 3/8] drivers: pinctrl: Add Qualcomm SM6350 TLMM driver

[Neil Armstrong]

On 18/06/2025 16:25, Luca Weiss wrote:
> Add support for TLMM pin controller block (Top Level Mode Multiplexer)
> on SM6350 SoC, with support for special pins.
> 
> Correct pin configuration is required for working debug UART and eMMC/SD
> cards.
> 
> Signed-off-by: Luca Weiss <luca.weiss at fairphone.com>
> ---
>   drivers/pinctrl/qcom/Kconfig          |   7 +++
>   drivers/pinctrl/qcom/Makefile         |   1 +
>   drivers/pinctrl/qcom/pinctrl-sm6350.c | 104 ++++++++++++++++++++++++++++++++++
>   3 files changed, 112 insertions(+)
> 
> diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
> index e567cb113a316592c6cfb9f42350fc60291772bc..bfda968299d694ba7db9796e561799ab0195328a 100644
> --- a/drivers/pinctrl/qcom/Kconfig
> +++ b/drivers/pinctrl/qcom/Kconfig
> @@ -82,6 +82,13 @@ config PINCTRL_QCOM_SM6115
>   	  Say Y here to enable support for pinctrl on the Snapdragon SM6115 SoC,
>   	  as well as the associated GPIO driver.
>   
> +config PINCTRL_QCOM_SM6350
> +	bool "Qualcomm SM6350 Pinctrl"
> +	select PINCTRL_QCOM
> +	help
> +	  Say Y here to enable support for pinctrl on the Snapdragon SM6350 SoC,
> +	  as well as the associated GPIO driver.
> +
>   config PINCTRL_QCOM_SM8150
>   	bool "Qualcomm SM8150 Pinctrl"
>   	select PINCTRL_QCOM
> diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
> index 6ffc6d48c1553a21bdf6aecdaee41c76251fae2d..8a3ad5d39f7869f2dabecc829961a5d7fe9cc596 100644
> --- a/drivers/pinctrl/qcom/Makefile
> +++ b/drivers/pinctrl/qcom/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_PINCTRL_QCOM_SC7280) += pinctrl-sc7280.o
>   obj-$(CONFIG_PINCTRL_QCOM_SDM660) += pinctrl-sdm660.o
>   obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o
>   obj-$(CONFIG_PINCTRL_QCOM_SM6115) += pinctrl-sm6115.o
> +obj-$(CONFIG_PINCTRL_QCOM_SM6350) += pinctrl-sm6350.o
>   obj-$(CONFIG_PINCTRL_QCOM_SM8150) += pinctrl-sm8150.o
>   obj-$(CONFIG_PINCTRL_QCOM_SM8250) += pinctrl-sm8250.o
>   obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o
> diff --git a/drivers/pinctrl/qcom/pinctrl-sm6350.c b/drivers/pinctrl/qcom/pinctrl-sm6350.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..1cbed77b55f28ce5f644173dfb3cba5398db504f
> --- /dev/null
> +++ b/drivers/pinctrl/qcom/pinctrl-sm6350.c
> @@ -0,0 +1,104 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Qualcomm sm6350 pinctrl
> + *
> + * (C) Copyright 2024 Linaro Ltd.
> + * (C) Copyright 2025 Luca Weiss <luca.weiss at fairphone.com>
> + *
> + */
> +
> +#include <dm.h>
> +
> +#include "pinctrl-qcom.h"
> +
> +#define MAX_PIN_NAME_LEN 32
> +static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
> +
> +static const struct pinctrl_function msm_pinctrl_functions[] = {
> +	{"qup13_f2", 1},
> +	{"gpio", 0},
> +};
> +
> +#define SDC_PINGROUP(pg_name, ctl, pull, drv)		\
> +	{						\
> +		.name = pg_name,			\
> +		.ctl_reg = ctl,				\
> +		.io_reg = 0,				\
> +		.pull_bit = pull,			\
> +		.drv_bit = drv,				\
> +		.oe_bit = -1,				\
> +		.in_bit = -1,				\
> +		.out_bit = -1,				\
> +	}
> +
> +#define UFS_RESET(pg_name, offset)			\
> +	{						\
> +		.name = pg_name,			\
> +		.ctl_reg = offset,			\
> +		.io_reg = offset + 0x4,			\
> +		.pull_bit = 3,				\
> +		.drv_bit = 0,				\
> +		.oe_bit = -1,				\
> +		.in_bit = -1,				\
> +		.out_bit = 0,				\
> +	}
> +
> +static const struct msm_special_pin_data sm6350_special_pins_data[] = {
> +	[0] = UFS_RESET("ufs_reset", 0xae000),
> +	[1] = SDC_PINGROUP("sdc1_rclk", 0xa1000, 15, 0),
> +	[2] = SDC_PINGROUP("sdc1_clk", 0xa0000, 13, 6),
> +	[3] = SDC_PINGROUP("sdc1_cmd", 0xa0000, 11, 3),
> +	[4] = SDC_PINGROUP("sdc1_data", 0xa0000, 9, 0),
> +	[5] = SDC_PINGROUP("sdc2_clk", 0xa2000, 14, 6),
> +	[6] = SDC_PINGROUP("sdc2_cmd", 0xa2000, 11, 3),
> +	[7] = SDC_PINGROUP("sdc2_data", 0xa2000, 9, 0),
> +};
> +
> +static const char *sm6350_get_function_name(struct udevice *dev,
> +					    unsigned int selector)
> +{
> +	return msm_pinctrl_functions[selector].name;
> +}
> +
> +static const char *sm6350_get_pin_name(struct udevice *dev,
> +				       unsigned int selector)
> +{
> +	if (selector >= 156 && selector <= 163)
> +		snprintf(pin_name, MAX_PIN_NAME_LEN,
> +			 sm6350_special_pins_data[selector - 156].name);
> +	else
> +		snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
> +
> +	return pin_name;
> +}
> +
> +static int sm6350_get_function_mux(__maybe_unused unsigned int pin,
> +				   unsigned int selector)
> +{
> +	return msm_pinctrl_functions[selector].val;
> +}
> +
> +static struct msm_pinctrl_data sm6350_data = {
> +	.pin_data = {
> +		.pin_count = 164,
> +		.special_pins_start = 156,
> +		.special_pins_data = sm6350_special_pins_data,
> +	},
> +	.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
> +	.get_function_name = sm6350_get_function_name,
> +	.get_function_mux = sm6350_get_function_mux,
> +	.get_pin_name = sm6350_get_pin_name,
> +};
> +
> +static const struct udevice_id msm_pinctrl_ids[] = {
> +	{ .compatible = "qcom,sm6350-tlmm", .data = (ulong)&sm6350_data },
> +	{ /* Sentinel */ }
> +};
> +
> +U_BOOT_DRIVER(pinctrl_sm6350) = {
> +	.name		= "pinctrl_sm6350",
> +	.id		= UCLASS_NOP,
> +	.of_match	= msm_pinctrl_ids,
> +	.ops		= &msm_pinctrl_ops,
> +	.bind		= msm_pinctrl_bind,
> +};
> 

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>