[PATCH 03/10] ARM: stm32: Limit early cache enablement in SPL to STM32MP15xx

Marek Vasut marek.vasut at mailbox.org
Sun Jun 29 21:10:52 CEST 2025


On 6/3/25 3:37 PM, Patrick DELAUNAY wrote:

Hi,

>> diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach- 
>> stm32mp/stm32mp1/cpu.c
>> index 9ab5a3ede52..1ae82489a4b 100644
>> --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
>> +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
>> @@ -28,7 +28,9 @@
>>    * early TLB into the .data section so that it not get cleared
>>    * with 16kB allignment (see TTBR0_BASE_ADDR_MASK)
>>    */
>> +#if (!IS_ENABLED(CONFIG_XPL_BUILD) || !IS_ENABLED(CONFIG_STM32MP13X))
>>   u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
>> +#endif
>>   u32 get_bootmode(void)
>>   {
>> @@ -95,18 +97,19 @@ void dram_bank_mmu_setup(int bank)
>>    */
>>   static void early_enable_caches(void)
>>   {
>> +#if (!IS_ENABLED(CONFIG_XPL_BUILD) || !IS_ENABLED(CONFIG_STM32MP13X))
> 
> 
> can you replace #if, if it possible?
> 
> 
> if (!IS_ENABLED(CONFIG_XPL_BUILD) || !IS_ENABLED(CONFIG_STM32MP13X))
> 
>      return;
No, because of the "u8 early_tlb[PGTABLE_SIZE] __section(".data") 
__aligned(0x4000);" dependency which really must be compiled out using 
#if ... #endif. If the early_tlb is unreachable due to preprocessor 
macros, then early_enable_caches() cannot reference it, hence the #if 
... in it.


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