[PATCH v4 09/22] passage: arm: Accept a passage from the previous phase

[Simon Glass]

Accept a bloblist and control devicetree from a previous phase in
registers 0 to 3, as documented in the Firmware Handoff
specification[1].

Note that there is currently a weak function called save_boot_params()
which happens to save the same registers as are needed for this
protocol. But it seems better to implement this feature as a first-class
citizen, if for no other reason than that many boards have their own
version of save_boot_params() which may not happen to save the required
registers. A weak function is not a good basis for an API.

[1] https://firmwarehandoff.github.io/firmware_handoff/main/index.html

Signed-off-by: Simon Glass <sjg at chromium.org>
---
While some efforts were made to encourage Intel to adopt this
specification, this has not yet been successful. However I do intend to
use my proposed x86 handoff in U-Boot, once this series is in.

Changes in v4:
- Update commit message to indicate this can only be for ARM at present
- Update commit message to mention why save_boot_params() is not used

Changes in v3:
- Add support for aarch64 also
- Update registers to match the Firmware Handoff protocol

Changes in v2:
- Use three registers instead of two for the entry

 arch/arm/cpu/armv7/start.S | 10 +++++++++-
 arch/arm/cpu/armv8/start.S | 12 ++++++++++++
 arch/arm/lib/crt0.S        |  6 ++++++
 arch/arm/lib/crt0_64.S     |  6 ++++++
 4 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 959251957de..81cb20987ad 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -40,6 +40,14 @@ reset:
 	/* Allow the board to save important registers */
 	b	save_boot_params
 save_boot_params_ret:
+#if CONFIG_IS_ENABLED(PASSAGE_IN)
+	# Keep passage information in case it is provided
+	cmp	r0, #0
+	moveq	r6, r1		/* mach */
+	moveq	r7, r2		/* dtb */
+	moveq	r8, r3		/* bloblist */
+	movne	r6, #0
+#endif
 #ifdef CONFIG_POSITION_INDEPENDENT
 	/*
 	 * Fix .rela.dyn relocations. This allows U-Boot to loaded to and
@@ -123,7 +131,7 @@ switch_to_hypervisor_ret:
 	bl	cpu_init_crit
 #endif
 #endif
-
+	# Note: r6-r8 are available to _main in case standard passage is used
 	bl	_main
 
 /*------------------------------------------------------------------------------*/
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 829a620faeb..75d2fd1e271 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -57,6 +57,18 @@ reset:
 	b	save_boot_params
 .globl	save_boot_params_ret
 save_boot_params_ret:
+#if CONFIG_IS_ENABLED(PASSAGE_IN)
+	# Keep passage information in case it is provided
+	cmp	x2, #0
+	bne	no_passage
+	mov	x19, x1		/* mach */
+	mov	x20, x0		/* dtb */
+	mov	x21, x3		/* bloblist */
+	b	passage_done
+no_passage:
+	mov	x19, #0
+passage_done:
+#endif
 
 #if CONFIG_POSITION_INDEPENDENT && !defined(CONFIG_XPL_BUILD)
 	/* Verify that we're 4K aligned.  */
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index a50dde60e8b..ab758ca900f 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -113,6 +113,12 @@ ENTRY(_main)
 	mov	r9, r0
 	bl	board_init_f_init_reserve
 
+#if CONFIG_IS_ENABLED(PASSAGE_IN)
+	str	r6, [r9, #GD_PASSAGE_MACH]
+	str	r7, [r9, #GD_PASSAGE_DTB]
+	str	r8, [r9, #GD_PASSAGE_BLOBLIST]
+#endif
+
 #if defined(CONFIG_DEBUG_UART) && CONFIG_IS_ENABLED(SERIAL)
 	bl	debug_uart_init
 #endif
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 30950ddaf9b..498fe849f50 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -94,6 +94,12 @@ ENTRY(_main)
 	bl	debug_uart_init
 #endif
 
+#if CONFIG_IS_ENABLED(PASSAGE_IN)
+	str	x19, [x18, #GD_PASSAGE_MACH]
+	str	x20, [x18, #GD_PASSAGE_DTB]
+	str	x21, [x18, #GD_PASSAGE_BLOBLIST]
+#endif
+
 	mov	x0, #0
 	bl	board_init_f
 
-- 
2.43.0