[PATCH v4 09/28] coreboot: Set gd->ram_base when parsing tables
Stephen Boyd
swboyd at chromium.org
Sat May 24 00:58:24 CEST 2025
Set the base of RAM to be the lowest address memory bank from the
coreboot tables.
Signed-off-by: Stephen Boyd <swboyd at chromium.org>
---
lib/coreboot/sdram.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/lib/coreboot/sdram.c b/lib/coreboot/sdram.c
index ac9a95b1d378..25918af003f9 100644
--- a/lib/coreboot/sdram.c
+++ b/lib/coreboot/sdram.c
@@ -56,16 +56,22 @@ phys_addr_t coreboot_board_get_usable_ram_top(phys_size_t total_size)
int coreboot_dram_init(void)
{
int i;
+ phys_size_t ram_base = ~0UL;
phys_size_t ram_size = 0;
for (i = 0; i < lib_sysinfo.n_memranges; i++) {
struct memrange *memrange = &lib_sysinfo.memrange[i];
unsigned long long end = memrange->base + memrange->size;
- if (memrange->type == CB_MEM_RAM && end > ram_size)
- ram_size += memrange->size;
+ if (memrange->type == CB_MEM_RAM) {
+ if (ram_base > memrange->base)
+ ram_base = memrange->base;
+ if (end > ram_size)
+ ram_size += memrange->size;
+ }
}
+ gd->ram_base = ram_base;
gd->ram_size = ram_size;
if (ram_size == 0)
return -1;
--
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